ppc: Remove duplicate newlines
Drop all duplicate newlines. No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
diff --git a/arch/powerpc/cpu/mpc83xx/interrupts.c b/arch/powerpc/cpu/mpc83xx/interrupts.c
index d86c981..af51721 100644
--- a/arch/powerpc/cpu/mpc83xx/interrupts.c
+++ b/arch/powerpc/cpu/mpc83xx/interrupts.c
@@ -32,7 +32,6 @@
immr->sysconf.spcr |= 0x00400000;
}
-
/*
* Handle external interrupts
*/
@@ -41,7 +40,6 @@
{
}
-
/*
* Install and free an interrupt handler.
*/
@@ -51,19 +49,16 @@
{
}
-
void irq_free_handler(int irq)
{
}
-
void timer_interrupt_cpu (struct pt_regs *regs)
{
/* nothing to do here */
return;
}
-
#if defined(CONFIG_CMD_IRQ)
/* ripped this out of ppc4xx/interrupts.c */
diff --git a/arch/powerpc/cpu/mpc83xx/traps.c b/arch/powerpc/cpu/mpc83xx/traps.c
index 79ea1a9..d50499c 100644
--- a/arch/powerpc/cpu/mpc83xx/traps.c
+++ b/arch/powerpc/cpu/mpc83xx/traps.c
@@ -74,7 +74,6 @@
}
}
-
static void _exception(int signr, struct pt_regs *regs)
{
show_regs(regs);
@@ -191,7 +190,6 @@
panic("Software Emulation Exception");
}
-
void UnknownException(struct pt_regs *regs)
{
#if defined(CONFIG_CMD_KGDB)
diff --git a/arch/powerpc/cpu/mpc85xx/cpu.c b/arch/powerpc/cpu/mpc85xx/cpu.c
index ebce2fe..ab4ef15 100644
--- a/arch/powerpc/cpu/mpc85xx/cpu.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu.c
@@ -297,7 +297,6 @@
return 0;
}
-
/* ------------------------------------------------------------------------- */
int do_reset(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
@@ -337,7 +336,6 @@
return 1;
}
-
/*
* Get timebase clock frequency
*/
@@ -348,7 +346,6 @@
return (gd->bus_clk + (tbclk_div >> 1)) / tbclk_div;
}
-
/*
* Initializes on-chip MMC controllers.
* to override, implement board_mmc_init()
diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c b/arch/powerpc/cpu/mpc85xx/cpu_init.c
index b770d29..a7b805b 100644
--- a/arch/powerpc/cpu/mpc85xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c
@@ -128,7 +128,6 @@
}
#endif
-
#if defined(CONFIG_QE) && !defined(CONFIG_U_QE)
extern qe_iop_conf_t qe_iop_conf_tab[];
extern void qe_config_iopin(u8 port, u8 pin, int dir,
diff --git a/arch/powerpc/cpu/mpc85xx/fdt.c b/arch/powerpc/cpu/mpc85xx/fdt.c
index c56e98d..b2c0c51 100644
--- a/arch/powerpc/cpu/mpc85xx/fdt.c
+++ b/arch/powerpc/cpu/mpc85xx/fdt.c
@@ -428,7 +428,6 @@
ft_fixup_l2cache(blob);
}
-
void fdt_add_enet_stashing(void *fdt)
{
do_fixup_by_compat(fdt, "gianfar", "bd-stash", NULL, 0, 1);
diff --git a/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c b/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c
index 78316ea..f2f854e 100644
--- a/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c
+++ b/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c
@@ -482,7 +482,6 @@
printf("SERDES: timeout resetting bank %u\n", bank + 1);
}
-
static void __soc_serdes_init(void)
{
/* Allow for SoC-specific initialization in <SOC>_serdes.c */
diff --git a/arch/powerpc/cpu/mpc85xx/mp.c b/arch/powerpc/cpu/mpc85xx/mp.c
index b638f24..03f801e 100644
--- a/arch/powerpc/cpu/mpc85xx/mp.c
+++ b/arch/powerpc/cpu/mpc85xx/mp.c
@@ -191,7 +191,6 @@
struct law_entry e;
#endif
-
/* use last 4K of mapped memory */
bootpg = ((gd->ram_size > CFG_MAX_MEM_MAPPED) ?
CFG_MAX_MEM_MAPPED : gd->ram_size) +
diff --git a/arch/powerpc/cpu/mpc85xx/p1010_serdes.c b/arch/powerpc/cpu/mpc85xx/p1010_serdes.c
index d38041e..c119066 100644
--- a/arch/powerpc/cpu/mpc85xx/p1010_serdes.c
+++ b/arch/powerpc/cpu/mpc85xx/p1010_serdes.c
@@ -29,7 +29,6 @@
[0x03] = {PCIE1, PCIE2},
};
-
int is_serdes_configured(enum srds_prtcl device)
{
int ret;
diff --git a/arch/powerpc/cpu/mpc85xx/speed.c b/arch/powerpc/cpu/mpc85xx/speed.c
index a7e1b3c..d17a190 100644
--- a/arch/powerpc/cpu/mpc85xx/speed.c
+++ b/arch/powerpc/cpu/mpc85xx/speed.c
@@ -625,7 +625,6 @@
else return (1);
}
-
/********************************************
* get_bus_freq
* return system bus freq in Hz
diff --git a/arch/powerpc/cpu/mpc85xx/t1024_serdes.c b/arch/powerpc/cpu/mpc85xx/t1024_serdes.c
index 0d958fe..ff76bed 100644
--- a/arch/powerpc/cpu/mpc85xx/t1024_serdes.c
+++ b/arch/powerpc/cpu/mpc85xx/t1024_serdes.c
@@ -7,7 +7,6 @@
#include <asm/processor.h>
#include <asm/io.h>
-
static u8 serdes_cfg_tbl[][SRDS_MAX_LANES] = {
[0x40] = {PCIE1, PCIE1, PCIE1, PCIE1},
[0xD5] = {QSGMII_FM1_A, PCIE3, PCIE2, PCIE1},
diff --git a/arch/powerpc/cpu/mpc85xx/t1040_serdes.c b/arch/powerpc/cpu/mpc85xx/t1040_serdes.c
index 2033ebb..fb59a3e 100644
--- a/arch/powerpc/cpu/mpc85xx/t1040_serdes.c
+++ b/arch/powerpc/cpu/mpc85xx/t1040_serdes.c
@@ -9,7 +9,6 @@
#include <asm/io.h>
#include <asm/ppc.h>
-
static u8 serdes_cfg_tbl[][SRDS_MAX_LANES] = {
[0x00] = {PCIE1, PCIE1, PCIE1, PCIE1,
PCIE2, PCIE2, PCIE2, PCIE2},
diff --git a/arch/powerpc/cpu/mpc85xx/tlb.c b/arch/powerpc/cpu/mpc85xx/tlb.c
index e0b36f8..32b68a1 100644
--- a/arch/powerpc/cpu/mpc85xx/tlb.c
+++ b/arch/powerpc/cpu/mpc85xx/tlb.c
@@ -354,5 +354,4 @@
clear_ddr_tlbs_phys(CFG_SYS_DDR_SDRAM_BASE, memsize_in_meg);
}
-
#endif /* not SPL */
diff --git a/arch/powerpc/cpu/mpc85xx/traps.c b/arch/powerpc/cpu/mpc85xx/traps.c
index db70f07..a1c111e 100644
--- a/arch/powerpc/cpu/mpc85xx/traps.c
+++ b/arch/powerpc/cpu/mpc85xx/traps.c
@@ -111,7 +111,6 @@
}
}
-
static void _exception(int signr, struct pt_regs *regs)
{
show_regs(regs);
diff --git a/arch/powerpc/cpu/mpc8xx/immap.c b/arch/powerpc/cpu/mpc8xx/immap.c
index 8c85fc1..09aaebc 100644
--- a/arch/powerpc/cpu/mpc8xx/immap.c
+++ b/arch/powerpc/cpu/mpc8xx/immap.c
@@ -206,7 +206,6 @@
if (pin > 31)
rcode = 1;
-
switch (argv[3][0]) {
case 'd':
if (argv[3][1] == 'a')
diff --git a/arch/powerpc/cpu/mpc8xx/traps.c b/arch/powerpc/cpu/mpc8xx/traps.c
index 5220c56..22f2f58 100644
--- a/arch/powerpc/cpu/mpc8xx/traps.c
+++ b/arch/powerpc/cpu/mpc8xx/traps.c
@@ -75,7 +75,6 @@
}
}
-
static void _exception(int signr, struct pt_regs *regs)
{
show_regs(regs);
@@ -142,7 +141,6 @@
panic("Software Emulation Exception");
}
-
void UnknownException(struct pt_regs *regs)
{
printf("Bad trap at PC: %lx, SR: %lx, vector=%lx\n",
diff --git a/arch/powerpc/cpu/mpc8xxx/cpu.c b/arch/powerpc/cpu/mpc8xxx/cpu.c
index 82f2874..d64eb73 100644
--- a/arch/powerpc/cpu/mpc8xxx/cpu.c
+++ b/arch/powerpc/cpu/mpc8xxx/cpu.c
@@ -300,7 +300,6 @@
return cpu->num_cores;
}
-
/*
* Check if the given core ID is valid
*
diff --git a/arch/powerpc/cpu/mpc8xxx/fsl_lbc.c b/arch/powerpc/cpu/mpc8xxx/fsl_lbc.c
index 843dd19..9b7a079 100644
--- a/arch/powerpc/cpu/mpc8xxx/fsl_lbc.c
+++ b/arch/powerpc/cpu/mpc8xxx/fsl_lbc.c
@@ -20,7 +20,6 @@
void lbc_sdram_init(void) __attribute__((weak, alias("__lbc_sdram_init")));
#endif
-
void print_lbc_regs(void)
{
int i;
diff --git a/arch/powerpc/cpu/mpc8xxx/fsl_pamu.c b/arch/powerpc/cpu/mpc8xxx/fsl_pamu.c
index 29399bc..3a82e60 100644
--- a/arch/powerpc/cpu/mpc8xxx/fsl_pamu.c
+++ b/arch/powerpc/cpu/mpc8xxx/fsl_pamu.c
@@ -26,7 +26,6 @@
return __ilog2_u64(val) + 1;
}
-
static inline int count_lsb_zeroes(unsigned long val)
{
return ffs(val) - 1;
@@ -332,7 +331,6 @@
u32 i = 0;
u32 base_addr = CFG_SYS_PAMU_ADDR;
-
for (i = 0; i < CFG_NUM_PAMU; i++) {
clrbits_be32((void *)base_addr + PAMU_PCR_OFFSET, PAMU_PCR_PE);
sync();
@@ -340,7 +338,6 @@
}
}
-
static uint64_t find_max(uint64_t arr[], int num)
{
int i = 0;
diff --git a/arch/powerpc/cpu/mpc8xxx/law.c b/arch/powerpc/cpu/mpc8xxx/law.c
index f3a9749..b4695cc 100644
--- a/arch/powerpc/cpu/mpc8xxx/law.c
+++ b/arch/powerpc/cpu/mpc8xxx/law.c
@@ -31,7 +31,6 @@
#define LAWBAR_SHIFT 12
#endif
-
static inline phys_addr_t get_law_base_addr(int idx)
{
#ifdef CONFIG_FSL_CORENET
diff --git a/arch/powerpc/include/asm/bitops.h b/arch/powerpc/include/asm/bitops.h
index 96491b6..b22eeba 100644
--- a/arch/powerpc/include/asm/bitops.h
+++ b/arch/powerpc/include/asm/bitops.h
@@ -270,7 +270,6 @@
return result + ffz(tmp);
}
-
#define _EXT2_HAVE_ASM_BITOPS_
#ifdef __KERNEL__
diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h
index d990ecf..819250f 100644
--- a/arch/powerpc/include/asm/config_mpc85xx.h
+++ b/arch/powerpc/include/asm/config_mpc85xx.h
@@ -82,7 +82,6 @@
#define CFG_SYS_FM_MURAM_SIZE 0x28000
#define CFG_SYS_FSL_CORENET_SNOOPVEC_COREONLY 0xf0000000
-
#elif defined(CONFIG_ARCH_T4240)
#ifdef CONFIG_ARCH_T4240
#define CFG_SYS_FSL_CLUSTER_CLOCKS { 1, 1, 4 }
@@ -168,7 +167,6 @@
#define CFG_SYS_FM_MURAM_SIZE 0x28000
#define ESDHCI_QUIRK_BROKEN_TIMEOUT_VALUE
-
#elif defined(CONFIG_ARCH_C29X)
#define CFG_SYS_FSL_SEC_IDX_OFFSET 0x20000
diff --git a/arch/powerpc/include/asm/fsl_pci.h b/arch/powerpc/include/asm/fsl_pci.h
index 809ab1d..6c6e436 100644
--- a/arch/powerpc/include/asm/fsl_pci.h
+++ b/arch/powerpc/include/asm/fsl_pci.h
@@ -269,5 +269,4 @@
#error FT_FSL_PCI_SETUP not defined
#endif
-
#endif
diff --git a/arch/powerpc/include/asm/io.h b/arch/powerpc/include/asm/io.h
index 2412bb9..9a59ed8 100644
--- a/arch/powerpc/include/asm/io.h
+++ b/arch/powerpc/include/asm/io.h
@@ -92,7 +92,6 @@
#define insl_ns(port, buf, nl) _insl_ns((u32 *)((port)+_IO_BASE), (buf), (nl))
#define outsl_ns(port, buf, nl) _outsl_ns((u32 *)((port)+_IO_BASE), (buf), (nl))
-
#define IO_SPACE_LIMIT ~0
#define memset_io(a,b,c) memset((void __force *)(a),(b),(c))
diff --git a/arch/powerpc/include/asm/mmu.h b/arch/powerpc/include/asm/mmu.h
index b0aafdc..bc7716b 100644
--- a/arch/powerpc/include/asm/mmu.h
+++ b/arch/powerpc/include/asm/mmu.h
@@ -126,7 +126,6 @@
#define PT_MASK 0x02FF
#define PG_SHIFT (12) /* Page Entry */
-
/* MMU context */
typedef struct _MMU_context {
@@ -304,7 +303,6 @@
#define M_CASID 793 /* Address space ID (context) to match */
#define MC_ASIDMASK 0x0000000f /* Bits used for ASID value */
-
/* These are the Ks and Kp from the PowerPC books. For proper operation,
* Ks = 0, Kp = 1.
*/
@@ -349,7 +347,6 @@
#define MD_SVALID 0x00000001 /* Segment entry is valid */
/* Reset value is undefined */
-
/* Real page number. Defined by the pte. Writing this register
* causes a TLB entry to be created for the data TLB, using
* additional information from the MD_EPN, and MD_TWC registers.
diff --git a/arch/powerpc/include/asm/mpc8349_pci.h b/arch/powerpc/include/asm/mpc8349_pci.h
index 7a1adba..3d920c2 100644
--- a/arch/powerpc/include/asm/mpc8349_pci.h
+++ b/arch/powerpc/include/asm/mpc8349_pci.h
@@ -1,7 +1,6 @@
#ifndef _PPC_KERNEL_MPC8349_PCI_H
#define _PPC_KERNEL_MPC8349_PCI_H
-
#define M8265_PCIBR0 0x101ac
#define M8265_PCIBR1 0x101b0
#define M8265_PCIMSK0 0x101c4
@@ -30,10 +29,8 @@
#define PCIMSK_512MB 0xE0000000
#define PCIMSK_1GB 0xC0000000 /* Size of window, largest */
-
#define M826X_SCCR_PCI_MODE_EN 0x100
-
/*
* Outbound ATU registers (3 sets). These registers control how 60x bus
* (local) addresses are translated to PCI addresses when the MPC826x is
diff --git a/arch/powerpc/include/asm/sigcontext.h b/arch/powerpc/include/asm/sigcontext.h
index 715c868..5dee3ba 100644
--- a/arch/powerpc/include/asm/sigcontext.h
+++ b/arch/powerpc/include/asm/sigcontext.h
@@ -3,7 +3,6 @@
#include <asm/ptrace.h>
-
struct sigcontext_struct {
unsigned long _unused[4];
int signal;
diff --git a/arch/powerpc/lib/bootm.c b/arch/powerpc/lib/bootm.c
index f55b5ff..61e0872 100644
--- a/arch/powerpc/lib/bootm.c
+++ b/arch/powerpc/lib/bootm.c
@@ -6,7 +6,6 @@
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
-
#include <config.h>
#include <bootm.h>
#include <bootstage.h>
diff --git a/arch/powerpc/lib/interrupts.c b/arch/powerpc/lib/interrupts.c
index 92b8a0b..46208ae 100644
--- a/arch/powerpc/lib/interrupts.c
+++ b/arch/powerpc/lib/interrupts.c
@@ -32,7 +32,6 @@
return val;
}
-
static __inline__ void set_dec (unsigned long val)
{
if (val)