commit cd70834418f7705a4a14c3e4f022ec5285324d5a
author Michal Simek <michal.simek@xilinx.com> Thu Sep 10 12:57:16 2020 +0200
committer Michal Simek <michal.simek@xilinx.com> Wed Sep 23 10:31:41 2020 +0200
tree 6e3eda103a0318a45ef45c4e82d5580a3523900c
parent 1aab1148011595cd70e63591e0e91ac078f2a7ad

fpga: zynqmp: Protect zynqmp_loads() for SPL

if conditions should match.

Fixes: a18d09ea384f ("fpga: zynqmp: Add secure bitstream loading for ZynqMP")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

drivers/fpga/zynqmppl.c

diff --git a/drivers/fpga/zynqmppl.c b/drivers/fpga/zynqmppl.c
index 03878d3..8ce140a 100644
--- a/drivers/fpga/zynqmppl.c
+++ b/drivers/fpga/zynqmppl.c
@@ -305,7 +305,7 @@
 
 struct xilinx_fpga_op zynqmp_op = {
 	.load = zynqmp_load,
-#if defined CONFIG_CMD_FPGA_LOAD_SECURE
+#if defined(CONFIG_CMD_FPGA_LOAD_SECURE) && !defined(CONFIG_SPL_BUILD)
 	.loads = zynqmp_loads,
 #endif
 	.info = zynqmp_pcap_info,