// SPDX-License-Identifier: GPL-2.0+
/*
 * (C) Copyright 2019 Rockchip Electronics Co., Ltd
 */

#include "rockchip-u-boot.dtsi"

/ {
	aliases {
		mmc0 = &emmc;
		mmc1 = &sdmmc;
		spi0 = &spi0;
	};

	chosen {
		u-boot,spl-boot-order = "same-as-spl", &sdmmc, &emmc;
	};

	dmc: dmc {
		compatible = "rockchip,rk3328-dmc";
		reg = <0x0 0xff400000 0x0 0x1000
		       0x0 0xff780000 0x0 0x3000
		       0x0 0xff100000 0x0 0x1000
		       0x0 0xff440000 0x0 0x1000
		       0x0 0xff720000 0x0 0x1000
		       0x0 0xff798000 0x0 0x1000>;
		bootph-all;
	};
};

&cru {
	bootph-all;
};

&emmc {
	bootph-pre-ram;
	bootph-some-ram;

	/* mmc to sram can't do dma, prevent aborts transferring TF-A parts */
	u-boot,spl-fifo-mode;
};

&emmc_bus8 {
	bootph-pre-ram;
	bootph-some-ram;
};

&emmc_clk {
	bootph-pre-ram;
	bootph-some-ram;
};

&emmc_cmd {
	bootph-pre-ram;
	bootph-some-ram;
};

&gpio0 {
	bootph-pre-ram;
};

&grf {
	bootph-all;
};

&pcfg_pull_none {
	bootph-all;
};

&pcfg_pull_none_8ma {
	bootph-pre-ram;
	bootph-some-ram;
};

&pcfg_pull_none_12ma {
	bootph-pre-ram;
	bootph-some-ram;
};

&pcfg_pull_up {
	bootph-all;
};

&pcfg_pull_up_4ma {
	bootph-pre-ram;
	bootph-some-ram;
};

&pcfg_pull_up_8ma {
	bootph-pre-ram;
	bootph-some-ram;
};

&pcfg_pull_up_12ma {
	bootph-pre-ram;
	bootph-some-ram;
};

&pinctrl {
	bootph-all;
};

&sdmmc {
	bootph-pre-ram;
	bootph-some-ram;

	/* mmc to sram can't do dma, prevent aborts transferring TF-A parts */
	u-boot,spl-fifo-mode;
};

&sdmmc0_bus4 {
	bootph-pre-ram;
	bootph-some-ram;
};

&sdmmc0_clk {
	bootph-pre-ram;
	bootph-some-ram;
};

&sdmmc0_cmd {
	bootph-pre-ram;
	bootph-some-ram;
};

&sdmmc0_dectn {
	bootph-pre-ram;
	bootph-some-ram;
};

&sdmmc0m1_pin {
	bootph-pre-ram;
};

&uart2 {
	bootph-all;
	clock-frequency = <24000000>;
};

&uart2m1_xfer {
	bootph-pre-sram;
	bootph-pre-ram;
};

&vop {
	bootph-some-ram;
};

#ifdef CONFIG_ROCKCHIP_SPI_IMAGE
&binman {
	simple-bin-spi {
		mkimage {
			args = "-n", CONFIG_SYS_SOC, "-T", "rksd";
			offset = <0x8000>;
		};
	};
};
#endif