| commit | cb3d2dee373ce5bcd03982725a14a8503f1f2c4f | [log] [tgz] |
|---|---|---|
| author | Peter Tyser <ptyser@xes-inc.com> | Tue Sep 16 10:04:47 2008 -0500 |
| committer | Andrew Fleming-AFLEMING <afleming@freescale.com> | Tue Sep 16 11:32:45 2008 -0500 |
| tree | 993313336b71bf495461cc8dd89f8afbb8858c9b | |
| parent | 971d673bb92e67f95b868922a2862a57d9c34ced [diff] |
Support for multiple SGMII/TBI interfaces for TSEC ethernet Fix TBI PHY accesses to use the proper offset in CPU register space. The previous code would incorrectly access the TBI PHY by reading/writing to CPU register space at the same location as would be used to access external PHYs. Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Acked-by: Andy Fleming <afleming@freescale.com>