sunxi: makes an invisible option for H3-like DRAM controllers
Allwinner SoCs after H3 (e.g. A64, H5, R40, V3s) uses a H3-like
DesignWare DRAM controller, which do not have official free DRAM
initialization code, but can use modified dram_sun8i_h3.c.
Add a invisible option for easier DRAM initialization code reuse.
Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig
index 7ced838..11da1ab 100644
--- a/arch/arm/mach-sunxi/Kconfig
+++ b/arch/arm/mach-sunxi/Kconfig
@@ -29,11 +29,19 @@
separate ahb reset control registers, custom pmic bus, new style
watchdog, etc.
+config SUNXI_DRAM_DW
+ bool
+ ---help---
+ Select this for sunxi SoCs which uses a DRAM controller like the
+ DesignWare controller used in H3, mainly SoCs after H3, which do
+ not have official open-source DRAM initialization code, but can
+ use modified H3 DRAM initialization code.
config MACH_SUNXI_H3_H5
bool
select DM_I2C
select SUNXI_DE2
+ select SUNXI_DRAM_DW
select SUNXI_GEN_SUN6I
select SUPPORT_SPL
@@ -118,6 +126,7 @@
select ARCH_SUPPORT_PSCI
select SUNXI_GEN_SUN6I
select SUPPORT_SPL
+ select SUNXI_DRAM_DW
config MACH_SUN8I_V3S
bool "sun8i (Allwinner V3s)"
@@ -143,6 +152,7 @@
select SUNXI_GEN_SUN6I
select SUNXI_HIGH_SRAM
select SUPPORT_SPL
+ select SUNXI_DRAM_DW
select FIT
select SPL_LOAD_FIT