commit c963ed1a9d0b8603f7801e9ac1acd9966069bba6
author Ye Li <ye.li@nxp.com> Fri Mar 19 15:57:16 2021 +0800
committer Stefano Babic <sbabic@denx.de> Thu Apr 08 09:18:29 2021 +0200
tree daa5830d4efc3c12f897f3e2de7311e6d361f590
parent 438b52a7e2f7f8c4fa2ade12e3bf662e6ce5947d

iMX8MQ: Recognize the B2 revision

i.MX8MQ B2 is using same value in OCOTP_READ_FUSE_DATA like B1, so
we have to check the ROM verision to distinguish the revision.

As we have checked the B1 rev for sticky bits work around in
secure boot. So it won't apply on B2.

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>

arch/arm/include/asm/arch-imx/cpu.h

diff --git a/arch/arm/include/asm/arch-imx/cpu.h b/arch/arm/include/asm/arch-imx/cpu.h
index 28244d7..ef090eb 100644
--- a/arch/arm/include/asm/arch-imx/cpu.h
+++ b/arch/arm/include/asm/arch-imx/cpu.h
@@ -65,6 +65,7 @@
 #define CHIP_REV_1_5            0x15
 #define CHIP_REV_2_0            0x20
 #define CHIP_REV_2_1            0x21
+#define CHIP_REV_2_2            0x22
 #define CHIP_REV_2_5            0x25
 #define CHIP_REV_3_0            0x30