tree d73b7d81bbb74b66553fd3c6965c5f9b50b64b45
parent 1c262251d740712e3e8119d0cea4ae4d24d25f65
author Paul Burton <paul.burton@imgtec.com> 1473317251 +0100
committer Daniel Schwierzeck <daniel.schwierzeck@gmail.com> 1474463072 +0200

pci: xilinx: Add a driver for Xilinx AXI to PCIe bridge

This patch adds a driver for the Xilinx AXI bridge for PCI express, an
IP block which can be used on some generations of Xilinx FPGAs. This is
mostly a case of implementing PCIe ECAM specification, but with some
quirks about what devices are valid to access.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Reviewed-by: Simon Glass <sjg@chromium.org>