rockchip: rk322x: use ARM arch timer instead of rk_timer
We prefer to use ARM arch timer instead of rockchip timer, so that
we are using the same timer for SPL, U-Boot and Kernel, which will
make things simple and easy to track to boot time.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
index 0c169e9..933b0a1 100644
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -42,7 +42,7 @@
obj-$(CONFIG_$(SPL_TPL_)RAM) += sdram_common.o
ifndef CONFIG_ARM64
-ifndef CONFIG_ROCKCHIP_RK3188
+ifeq ($(CONFIG_ROCKCHIP_RK3188)$(CONFIG_ROCKCHIP_RK322X),)
obj-y += rk_timer.o
endif
endif
diff --git a/arch/arm/mach-rockchip/rk322x-board-spl.c b/arch/arm/mach-rockchip/rk322x-board-spl.c
index c9b41c6..c825e31 100644
--- a/arch/arm/mach-rockchip/rk322x-board-spl.c
+++ b/arch/arm/mach-rockchip/rk322x-board-spl.c
@@ -19,6 +19,31 @@
return MMCSD_MODE_RAW;
}
+#define TIMER_LOAD_COUNT_L 0x00
+#define TIMER_LOAD_COUNT_H 0x04
+#define TIMER_CONTROL_REG 0x10
+#define TIMER_EN 0x1
+#define TIMER_FMODE BIT(0)
+#define TIMER_RMODE BIT(1)
+
+void rockchip_stimer_init(void)
+{
+ /* If Timer already enabled, don't re-init it */
+ u32 reg = readl(CONFIG_ROCKCHIP_STIMER_BASE + TIMER_CONTROL_REG);
+
+ if (reg & TIMER_EN)
+ return;
+
+ asm volatile("mcr p15, 0, %0, c14, c0, 0"
+ : : "r"(COUNTER_FREQUENCY));
+
+ writel(0, CONFIG_ROCKCHIP_STIMER_BASE + TIMER_CONTROL_REG);
+ writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE);
+ writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE + 4);
+ writel(TIMER_EN | TIMER_FMODE, CONFIG_ROCKCHIP_STIMER_BASE +
+ TIMER_CONTROL_REG);
+}
+
#define SGRF_DDR_CON0 0x10150000
void board_init_f(ulong dummy)
{
@@ -31,6 +56,11 @@
}
preloader_console_init();
+ /* Init secure timer */
+ rockchip_stimer_init();
+ /* Init ARM arch timer in arch/arm/cpu/armv7/arch_timer.c */
+ timer_init();
+
/* Disable the ddr secure region setting to make it non-secure */
rk_clrreg(SGRF_DDR_CON0, 0x4000);
}
diff --git a/arch/arm/mach-rockchip/rk322x-board-tpl.c b/arch/arm/mach-rockchip/rk322x-board-tpl.c
index 92d40ee..a0d7bc9 100644
--- a/arch/arm/mach-rockchip/rk322x-board-tpl.c
+++ b/arch/arm/mach-rockchip/rk322x-board-tpl.c
@@ -10,13 +10,37 @@
#include <spl.h>
#include <asm/io.h>
#include <asm/arch-rockchip/bootrom.h>
-#include <asm/arch-rockchip/timer.h>
u32 spl_boot_device(void)
{
return BOOT_DEVICE_MMC1;
}
+#define TIMER_LOAD_COUNT_L 0x00
+#define TIMER_LOAD_COUNT_H 0x04
+#define TIMER_CONTROL_REG 0x10
+#define TIMER_EN 0x1
+#define TIMER_FMODE BIT(0)
+#define TIMER_RMODE BIT(1)
+
+void rockchip_stimer_init(void)
+{
+ /* If Timer already enabled, don't re-init it */
+ u32 reg = readl(CONFIG_ROCKCHIP_STIMER_BASE + TIMER_CONTROL_REG);
+
+ if (reg & TIMER_EN)
+ return;
+
+ asm volatile("mcr p15, 0, %0, c14, c0, 0"
+ : : "r"(COUNTER_FREQUENCY));
+
+ writel(0, CONFIG_ROCKCHIP_STIMER_BASE + TIMER_CONTROL_REG);
+ writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE);
+ writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE + 4);
+ writel(TIMER_EN | TIMER_FMODE, CONFIG_ROCKCHIP_STIMER_BASE +
+ TIMER_CONTROL_REG);
+}
+
void board_init_f(ulong dummy)
{
struct udevice *dev;
@@ -39,8 +63,11 @@
hang();
}
- rockchip_timer_init();
- printf("timer init done\n");
+ /* Init secure timer */
+ rockchip_stimer_init();
+ /* Init ARM arch timer in arch/arm/cpu/armv7/arch_timer.c */
+ timer_init();
+
ret = uclass_get_device(UCLASS_RAM, 0, &dev);
if (ret) {
printf("DRAM init failed: %d\n", ret);
diff --git a/include/configs/rk322x_common.h b/include/configs/rk322x_common.h
index 15bb8d6..cc08699 100644
--- a/include/configs/rk322x_common.h
+++ b/include/configs/rk322x_common.h
@@ -13,9 +13,10 @@
#define CONFIG_SYS_CBSIZE 1024
#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */
-#define CONFIG_SYS_TIMER_RATE (24 * 1000 * 1000)
-#define CONFIG_SYS_TIMER_BASE 0x110c00a0 /* TIMER5 */
-#define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMER_BASE + 8)
+#define CONFIG_ROCKCHIP_STIMER_BASE 0x110d0020
+#define COUNTER_FREQUENCY 24000000
+#define CONFIG_SYS_ARCH_TIMER
+#define CONFIG_SYS_HZ_CLOCK 24000000
#define CONFIG_SYS_INIT_SP_ADDR 0x61100000
#define CONFIG_SYS_LOAD_ADDR 0x61800800
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index bd16795..e616f72 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -1532,6 +1532,7 @@
CONFIG_ROCKCHIP_CHIP_TAG
CONFIG_ROCKCHIP_MAX_INIT_SIZE
CONFIG_ROCKCHIP_SDHCI_MAX_FREQ
+CONFIG_ROCKCHIP_STIMER_BASE
CONFIG_ROM_STUBS
CONFIG_ROOTFS_OFFSET
CONFIG_ROOTPATH