tree 1cca1ed7acdbe9abef543f0b964075492be2f8a0
parent cffa50342ce2839a88e66fc2842391a063707bb6
author Alison Wang <b18965@freescale.com> 1491894133 +0800
committer York Sun <york.sun@nxp.com> 1493049583 -0700

arm: ls1021atwr: Enable RGMII TX/RX clock internal delay for AR8033

Since commit ce412b7, RGMII TX clock internal delay is not enabled
for AR8033 unconditionally. On LS1021ATWR board, the third port
eTSEC3 uses AR8033 in RGMII mode. The TX/RX internal delay needs to
be enabled.

This patch will set PHY_INTERFACE_MODE_RGMII_ID to enable RGMII TX/RX
clock internal delay for AR8033 on the third port.

Signed-off-by: Alison Wang <alison.wang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>