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git01.mediatek.com / filogic / uboot / c7e3112bce7ca64a895f735e156a79c6badaee3a / . / arch / arm / mach-socfpga
tree: e74d20edde903ba07a714ad203ee919b5dd9c9f0 [path history] [tgz]
  1. include/
  2. altera-sysmgr.c
  3. board.c
  4. clock_manager.c
  5. clock_manager_agilex.c
  6. clock_manager_agilex5.c
  7. clock_manager_arria10.c
  8. clock_manager_gen5.c
  9. clock_manager_n5x.c
  10. clock_manager_s10.c
  11. firewall.c
  12. fpga_manager.c
  13. freeze_controller.c
  14. Kconfig
  15. lowlevel_init_soc64.S
  16. mailbox_s10.c
  17. Makefile
  18. misc.c
  19. misc_arria10.c
  20. misc_gen5.c
  21. misc_soc64.c
  22. mmu-arm64_s10.c
  23. pinmux_arria10.c
  24. qts-filter-a10.sh
  25. qts-filter.sh
  26. reset_manager_arria10.c
  27. reset_manager_gen5.c
  28. reset_manager_s10.c
  29. scan_manager.c
  30. secure_reg_helper.c
  31. secure_vab.c
  32. smc_api.c
  33. spl_a10.c
  34. spl_agilex.c
  35. spl_gen5.c
  36. spl_n5x.c
  37. spl_s10.c
  38. spl_soc64.c
  39. system_manager_gen5.c
  40. system_manager_soc64.c
  41. timer.c
  42. timer_s10.c
  43. vab.c
  44. wrap_handoff_soc64.c
  45. wrap_iocsr_config.c
  46. wrap_pinmux_config.c
  47. wrap_pll_config.c
  48. wrap_pll_config_soc64.c
  49. wrap_sdram_config.c