Merge https://gitlab.denx.de/u-boot/custodians/u-boot-x86
- Avoid using hardcoded number of variable range MTRRs in mtrr_commit()
- coral: Correct max98357 file
- coral: Update smbios tables to latest definition
diff --git a/arch/x86/cpu/mtrr.c b/arch/x86/cpu/mtrr.c
index 5180eb0..6f095c5 100644
--- a/arch/x86/cpu/mtrr.c
+++ b/arch/x86/cpu/mtrr.c
@@ -158,7 +158,7 @@
/* Clear the ones that are unused */
debug("clear\n");
- for (; i < MTRR_MAX_COUNT; i++)
+ for (; i < mtrr_get_var_count(); i++)
wrmsrl(MTRR_PHYS_MASK_MSR(i), 0);
debug("close\n");
mtrr_close(&state, do_caches);
diff --git a/arch/x86/dts/chromebook_coral.dts b/arch/x86/dts/chromebook_coral.dts
index 43f4b33..d66e128 100644
--- a/arch/x86/dts/chromebook_coral.dts
+++ b/arch/x86/dts/chromebook_coral.dts
@@ -55,12 +55,27 @@
write-protect-gpios = <&gpio_nw GPIO_75 GPIO_ACTIVE_HIGH>;
phase-enforce-gpios = <&gpio_n GPIO_10 GPIO_ACTIVE_HIGH>;
smbios {
- manufacturer = "Google";
- product = "Coral";
- version = "rev2";
- serial = "123456789";
- sku = "sku3";
- family = "Google_Coral";
+ /* Type 1 table */
+ system {
+ manufacturer = "Google";
+ product = "Coral";
+ version = "rev2";
+ serial = "123456789";
+ sku = "sku3";
+ family = "Google_Coral";
+ };
+
+ /* Type 2 table */
+ baseboard {
+ manufacturer = "Google";
+ product = "Coral";
+ asset-tag = "ABC123";
+ };
+
+ /* Type 3 table */
+ chassis {
+ manufacturer = "Google";
+ };
};
};
diff --git a/board/google/chromebook_coral/max98357-render-2ch-48khz-24b.dat b/board/google/chromebook_coral/max98357-render-2ch-48khz-24b.dat
index e69de29..b0b5b9b 100644
--- a/board/google/chromebook_coral/max98357-render-2ch-48khz-24b.dat
+++ b/board/google/chromebook_coral/max98357-render-2ch-48khz-24b.dat
Binary files differ