Merge tag 'u-boot-imx-20210409' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx
u-boot-imx-20210409
-------------------
- Secure Boot :
- HAB for MX8M / MX7ULP
- CAAM fixes
- Fixes for imxrt1020
- Fixes for USDHC driver
- Fixes for Toradex (Colibri / Apalis)
- Switch to DM for several boards
- mx23 olinuxo
- usbarmory
- marsboard / riotboard
- Gateworks GW Ventana
- NXP upstream patches (LPDDR / CAAM / HAB)
CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/7089
diff --git a/arch/arm/mach-kirkwood/cpu.c b/arch/arm/mach-kirkwood/cpu.c
index 9c818fa..339ae7f 100644
--- a/arch/arm/mach-kirkwood/cpu.c
+++ b/arch/arm/mach-kirkwood/cpu.c
@@ -279,10 +279,3 @@
}
#endif
-#ifdef CONFIG_MVEBU_MMC
-int board_mmc_init(struct bd_info *bis)
-{
- mvebu_mmc_init(bis);
- return 0;
-}
-#endif /* CONFIG_MVEBU_MMC */
diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index 55eaee2..3f221dc 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -17,8 +17,8 @@
config TARGET_QEMU_VIRT
bool "Support QEMU Virt Board"
-config TARGET_SIFIVE_FU540
- bool "Support SiFive FU540 Board"
+config TARGET_SIFIVE_UNLEASHED
+ bool "Support SiFive Unleashed Board"
config TARGET_SIPEED_MAIX
bool "Support Sipeed Maix Board"
@@ -55,7 +55,7 @@
source "board/AndesTech/ax25-ae350/Kconfig"
source "board/emulation/qemu-riscv/Kconfig"
source "board/microchip/mpfs_icicle/Kconfig"
-source "board/sifive/fu540/Kconfig"
+source "board/sifive/unleashed/Kconfig"
source "board/sipeed/maix/Kconfig"
# platform-specific options below
@@ -271,4 +271,82 @@
config OF_BOARD_FIXUP
default y if OF_SEPARATE && RISCV_SMODE
+config USE_ARCH_MEMCPY
+ bool "Use an assembly optimized implementation of memcpy"
+ default y
+ help
+ Enable the generation of an optimized version of memcpy.
+ Such an implementation may be faster under some conditions
+ but may increase the binary size.
+
+config SPL_USE_ARCH_MEMCPY
+ bool "Use an assembly optimized implementation of memcpy for SPL"
+ default y if USE_ARCH_MEMCPY
+ depends on SPL
+ help
+ Enable the generation of an optimized version of memcpy.
+ Such an implementation may be faster under some conditions
+ but may increase the binary size.
+
+config TPL_USE_ARCH_MEMCPY
+ bool "Use an assembly optimized implementation of memcpy for TPL"
+ default y if USE_ARCH_MEMCPY
+ depends on TPL
+ help
+ Enable the generation of an optimized version of memcpy.
+ Such an implementation may be faster under some conditions
+ but may increase the binary size.
+
+config USE_ARCH_MEMMOVE
+ bool "Use an assembly optimized implementation of memmove"
+ default y
+ help
+ Enable the generation of an optimized version of memmove.
+ Such an implementation may be faster under some conditions
+ but may increase the binary size.
+
+config SPL_USE_ARCH_MEMMOVE
+ bool "Use an assembly optimized implementation of memmove for SPL"
+ default y if USE_ARCH_MEMCPY
+ depends on SPL
+ help
+ Enable the generation of an optimized version of memmove.
+ Such an implementation may be faster under some conditions
+ but may increase the binary size.
+
+config TPL_USE_ARCH_MEMMOVE
+ bool "Use an assembly optimized implementation of memmove for TPL"
+ default y if USE_ARCH_MEMCPY
+ depends on TPL
+ help
+ Enable the generation of an optimized version of memmove.
+ Such an implementation may be faster under some conditions
+ but may increase the binary size.
+
+config USE_ARCH_MEMSET
+ bool "Use an assembly optimized implementation of memset"
+ default y
+ help
+ Enable the generation of an optimized version of memset.
+ Such an implementation may be faster under some conditions
+ but may increase the binary size.
+
+config SPL_USE_ARCH_MEMSET
+ bool "Use an assembly optimized implementation of memset for SPL"
+ default y if USE_ARCH_MEMSET
+ depends on SPL
+ help
+ Enable the generation of an optimized version of memset.
+ Such an implementation may be faster under some conditions
+ but may increase the binary size.
+
+config TPL_USE_ARCH_MEMSET
+ bool "Use an assembly optimized implementation of memset for TPL"
+ default y if USE_ARCH_MEMSET
+ depends on TPL
+ help
+ Enable the generation of an optimized version of memset.
+ Such an implementation may be faster under some conditions
+ but may increase the binary size.
+
endmenu
diff --git a/arch/riscv/dts/Makefile b/arch/riscv/dts/Makefile
index 01331b0..8138d89 100644
--- a/arch/riscv/dts/Makefile
+++ b/arch/riscv/dts/Makefile
@@ -1,7 +1,7 @@
# SPDX-License-Identifier: GPL-2.0+
dtb-$(CONFIG_TARGET_AX25_AE350) += ae350_32.dtb ae350_64.dtb
-dtb-$(CONFIG_TARGET_SIFIVE_FU540) += hifive-unleashed-a00.dtb
+dtb-$(CONFIG_TARGET_SIFIVE_UNLEASHED) += hifive-unleashed-a00.dtb
dtb-$(CONFIG_TARGET_SIPEED_MAIX) += k210-maix-bit.dtb
dtb-$(CONFIG_TARGET_MICROCHIP_ICICLE) += microchip-mpfs-icicle-kit.dtb
diff --git a/arch/riscv/dts/k210.dtsi b/arch/riscv/dts/k210.dtsi
index 81b0401..0b79a29 100644
--- a/arch/riscv/dts/k210.dtsi
+++ b/arch/riscv/dts/k210.dtsi
@@ -439,7 +439,6 @@
interrupts = <21>;
clocks = <&sysclk K210_CLK_WDT0>;
resets = <&sysrst K210_RST_WDT0>;
- status = "disabled";
};
wdt1: watchdog@50410000 {
diff --git a/arch/riscv/dts/microchip-mpfs-icicle-kit.dts b/arch/riscv/dts/microchip-mpfs-icicle-kit.dts
index e2b9dec..89c4cf5 100644
--- a/arch/riscv/dts/microchip-mpfs-icicle-kit.dts
+++ b/arch/riscv/dts/microchip-mpfs-icicle-kit.dts
@@ -232,7 +232,6 @@
reg-shift = <2>;
interrupt-parent = <&plic>;
interrupts = <90>;
- clock-frequency = <150000000>;
clocks = <&clkcfg CLK_MMUART0>;
status = "okay";
};
@@ -294,7 +293,6 @@
reg-shift = <2>;
interrupt-parent = <&plic>;
interrupts = <91>;
- clock-frequency = <150000000>;
clocks = <&clkcfg CLK_MMUART1>;
status = "okay";
};
@@ -305,7 +303,6 @@
reg-shift = <2>;
interrupt-parent = <&plic>;
interrupts = <92>;
- clock-frequency = <150000000>;
clocks = <&clkcfg CLK_MMUART2>;
status = "okay";
};
@@ -316,7 +313,6 @@
reg-shift = <2>;
interrupt-parent = <&plic>;
interrupts = <93>;
- clock-frequency = <150000000>;
clocks = <&clkcfg CLK_MMUART3>;
status = "okay";
};
diff --git a/arch/riscv/include/asm/string.h b/arch/riscv/include/asm/string.h
index 0fc3424..7dee3e4 100644
--- a/arch/riscv/include/asm/string.h
+++ b/arch/riscv/include/asm/string.h
@@ -19,31 +19,25 @@
#undef __HAVE_ARCH_STRRCHR
#undef __HAVE_ARCH_STRCHR
-#undef __HAVE_ARCH_MEMCPY
-#undef __HAVE_ARCH_MEMMOVE
#undef __HAVE_ARCH_MEMCHR
#undef __HAVE_ARCH_MEMZERO
-#undef __HAVE_ARCH_MEMSET
+
+#undef __HAVE_ARCH_MEMCPY
+#if CONFIG_IS_ENABLED(USE_ARCH_MEMCPY)
+#define __HAVE_ARCH_MEMCPY
+#endif
+extern void *memcpy(void *, const void *, __kernel_size_t);
-#ifdef CONFIG_MARCO_MEMSET
-#define memset(_p, _v, _n) \
- (typeof(_p) (p) = (_p); \
- typeof(_v) (v) = (_v); \
- typeof(_n) (n) = (_n); \
- { \
- if ((n) != 0) { \
- if (__builtin_constant_p((v)) && (v) == 0) \
- __memzero((p), (n)); \
- else \
- memset((p), (v), (n)); \
- } \
- (p); \
- })
+#undef __HAVE_ARCH_MEMMOVE
+#if CONFIG_IS_ENABLED(USE_ARCH_MEMMOVE)
+#define __HAVE_ARCH_MEMMOVE
+#endif
+extern void *memmove(void *, const void *, __kernel_size_t);
-#define memzero(_p, _n) \
- (typeof(_p) (p) = (_p); \
- typeof(_n) (n) = (_n); \
- { if ((n) != 0) __memzero((p), (n)); (p); })
+#undef __HAVE_ARCH_MEMZERO
+#if CONFIG_IS_ENABLED(USE_ARCH_MEMSET)
+#define __HAVE_ARCH_MEMSET
#endif
+extern void *memset(void *, int, __kernel_size_t);
#endif /* __ASM_RISCV_STRING_H */
diff --git a/arch/riscv/lib/Makefile b/arch/riscv/lib/Makefile
index 12c14f2..ff0677a 100644
--- a/arch/riscv/lib/Makefile
+++ b/arch/riscv/lib/Makefile
@@ -36,3 +36,7 @@
extra-$(CONFIG_CMD_BOOTEFI_HELLO_COMPILE) += $(EFI_CRT0) $(EFI_RELOC)
extra-$(CONFIG_CMD_BOOTEFI_SELFTEST) += $(EFI_CRT0) $(EFI_RELOC)
extra-$(CONFIG_EFI) += $(EFI_CRT0) $(EFI_RELOC)
+
+obj-$(CONFIG_$(SPL_TPL_)USE_ARCH_MEMSET) += memset.o
+obj-$(CONFIG_$(SPL_TPL_)USE_ARCH_MEMMOVE) += memmove.o
+obj-$(CONFIG_$(SPL_TPL_)USE_ARCH_MEMCPY) += memcpy.o
diff --git a/arch/riscv/lib/memcpy.S b/arch/riscv/lib/memcpy.S
new file mode 100644
index 0000000..51ab716
--- /dev/null
+++ b/arch/riscv/lib/memcpy.S
@@ -0,0 +1,108 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * Copyright (C) 2013 Regents of the University of California
+ */
+
+#include <linux/linkage.h>
+#include <asm/asm.h>
+
+/* void *memcpy(void *, const void *, size_t) */
+ENTRY(__memcpy)
+WEAK(memcpy)
+ move t6, a0 /* Preserve return value */
+
+ /* Defer to byte-oriented copy for small sizes */
+ sltiu a3, a2, 128
+ bnez a3, 4f
+ /* Use word-oriented copy only if low-order bits match */
+ andi a3, t6, SZREG-1
+ andi a4, a1, SZREG-1
+ bne a3, a4, 4f
+
+ beqz a3, 2f /* Skip if already aligned */
+ /*
+ * Round to nearest double word-aligned address
+ * greater than or equal to start address
+ */
+ andi a3, a1, ~(SZREG-1)
+ addi a3, a3, SZREG
+ /* Handle initial misalignment */
+ sub a4, a3, a1
+1:
+ lb a5, 0(a1)
+ addi a1, a1, 1
+ sb a5, 0(t6)
+ addi t6, t6, 1
+ bltu a1, a3, 1b
+ sub a2, a2, a4 /* Update count */
+
+2:
+ andi a4, a2, ~((16*SZREG)-1)
+ beqz a4, 4f
+ add a3, a1, a4
+3:
+ REG_L a4, 0(a1)
+ REG_L a5, SZREG(a1)
+ REG_L a6, 2*SZREG(a1)
+ REG_L a7, 3*SZREG(a1)
+ REG_L t0, 4*SZREG(a1)
+ REG_L t1, 5*SZREG(a1)
+ REG_L t2, 6*SZREG(a1)
+ REG_L t3, 7*SZREG(a1)
+ REG_L t4, 8*SZREG(a1)
+ REG_L t5, 9*SZREG(a1)
+ REG_S a4, 0(t6)
+ REG_S a5, SZREG(t6)
+ REG_S a6, 2*SZREG(t6)
+ REG_S a7, 3*SZREG(t6)
+ REG_S t0, 4*SZREG(t6)
+ REG_S t1, 5*SZREG(t6)
+ REG_S t2, 6*SZREG(t6)
+ REG_S t3, 7*SZREG(t6)
+ REG_S t4, 8*SZREG(t6)
+ REG_S t5, 9*SZREG(t6)
+ REG_L a4, 10*SZREG(a1)
+ REG_L a5, 11*SZREG(a1)
+ REG_L a6, 12*SZREG(a1)
+ REG_L a7, 13*SZREG(a1)
+ REG_L t0, 14*SZREG(a1)
+ REG_L t1, 15*SZREG(a1)
+ addi a1, a1, 16*SZREG
+ REG_S a4, 10*SZREG(t6)
+ REG_S a5, 11*SZREG(t6)
+ REG_S a6, 12*SZREG(t6)
+ REG_S a7, 13*SZREG(t6)
+ REG_S t0, 14*SZREG(t6)
+ REG_S t1, 15*SZREG(t6)
+ addi t6, t6, 16*SZREG
+ bltu a1, a3, 3b
+ andi a2, a2, (16*SZREG)-1 /* Update count */
+
+4:
+ /* Handle trailing misalignment */
+ beqz a2, 6f
+ add a3, a1, a2
+
+ /* Use word-oriented copy if co-aligned to word boundary */
+ or a5, a1, t6
+ or a5, a5, a3
+ andi a5, a5, 3
+ bnez a5, 5f
+7:
+ lw a4, 0(a1)
+ addi a1, a1, 4
+ sw a4, 0(t6)
+ addi t6, t6, 4
+ bltu a1, a3, 7b
+
+ ret
+
+5:
+ lb a4, 0(a1)
+ addi a1, a1, 1
+ sb a4, 0(t6)
+ addi t6, t6, 1
+ bltu a1, a3, 5b
+6:
+ ret
+END(__memcpy)
diff --git a/arch/riscv/lib/memmove.S b/arch/riscv/lib/memmove.S
new file mode 100644
index 0000000..07d1d21
--- /dev/null
+++ b/arch/riscv/lib/memmove.S
@@ -0,0 +1,64 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+
+#include <linux/linkage.h>
+#include <asm/asm.h>
+
+ENTRY(__memmove)
+WEAK(memmove)
+ move t0, a0
+ move t1, a1
+
+ beq a0, a1, exit_memcpy
+ beqz a2, exit_memcpy
+ srli t2, a2, 0x2
+
+ slt t3, a0, a1
+ beqz t3, do_reverse
+
+ andi a2, a2, 0x3
+ li t4, 1
+ beqz t2, byte_copy
+
+word_copy:
+ lw t3, 0(a1)
+ addi t2, t2, -1
+ addi a1, a1, 4
+ sw t3, 0(a0)
+ addi a0, a0, 4
+ bnez t2, word_copy
+ beqz a2, exit_memcpy
+ j byte_copy
+
+do_reverse:
+ add a0, a0, a2
+ add a1, a1, a2
+ andi a2, a2, 0x3
+ li t4, -1
+ beqz t2, reverse_byte_copy
+
+reverse_word_copy:
+ addi a1, a1, -4
+ addi t2, t2, -1
+ lw t3, 0(a1)
+ addi a0, a0, -4
+ sw t3, 0(a0)
+ bnez t2, reverse_word_copy
+ beqz a2, exit_memcpy
+
+reverse_byte_copy:
+ addi a0, a0, -1
+ addi a1, a1, -1
+
+byte_copy:
+ lb t3, 0(a1)
+ addi a2, a2, -1
+ sb t3, 0(a0)
+ add a1, a1, t4
+ add a0, a0, t4
+ bnez a2, byte_copy
+
+exit_memcpy:
+ move a0, t0
+ move a1, t1
+ ret
+END(__memmove)
diff --git a/arch/riscv/lib/memset.S b/arch/riscv/lib/memset.S
new file mode 100644
index 0000000..34c5360
--- /dev/null
+++ b/arch/riscv/lib/memset.S
@@ -0,0 +1,113 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * Copyright (C) 2013 Regents of the University of California
+ */
+
+
+#include <linux/linkage.h>
+#include <asm/asm.h>
+
+/* void *memset(void *, int, size_t) */
+ENTRY(__memset)
+WEAK(memset)
+ move t0, a0 /* Preserve return value */
+
+ /* Defer to byte-oriented fill for small sizes */
+ sltiu a3, a2, 16
+ bnez a3, 4f
+
+ /*
+ * Round to nearest XLEN-aligned address
+ * greater than or equal to start address
+ */
+ addi a3, t0, SZREG-1
+ andi a3, a3, ~(SZREG-1)
+ beq a3, t0, 2f /* Skip if already aligned */
+ /* Handle initial misalignment */
+ sub a4, a3, t0
+1:
+ sb a1, 0(t0)
+ addi t0, t0, 1
+ bltu t0, a3, 1b
+ sub a2, a2, a4 /* Update count */
+
+2: /* Duff's device with 32 XLEN stores per iteration */
+ /* Broadcast value into all bytes */
+ andi a1, a1, 0xff
+ slli a3, a1, 8
+ or a1, a3, a1
+ slli a3, a1, 16
+ or a1, a3, a1
+#ifdef CONFIG_64BIT
+ slli a3, a1, 32
+ or a1, a3, a1
+#endif
+
+ /* Calculate end address */
+ andi a4, a2, ~(SZREG-1)
+ add a3, t0, a4
+
+ andi a4, a4, 31*SZREG /* Calculate remainder */
+ beqz a4, 3f /* Shortcut if no remainder */
+ neg a4, a4
+ addi a4, a4, 32*SZREG /* Calculate initial offset */
+
+ /* Adjust start address with offset */
+ sub t0, t0, a4
+
+ /* Jump into loop body */
+ /* Assumes 32-bit instruction lengths */
+ la a5, 3f
+#ifdef CONFIG_64BIT
+ srli a4, a4, 1
+#endif
+ add a5, a5, a4
+ jr a5
+3:
+ REG_S a1, 0(t0)
+ REG_S a1, SZREG(t0)
+ REG_S a1, 2*SZREG(t0)
+ REG_S a1, 3*SZREG(t0)
+ REG_S a1, 4*SZREG(t0)
+ REG_S a1, 5*SZREG(t0)
+ REG_S a1, 6*SZREG(t0)
+ REG_S a1, 7*SZREG(t0)
+ REG_S a1, 8*SZREG(t0)
+ REG_S a1, 9*SZREG(t0)
+ REG_S a1, 10*SZREG(t0)
+ REG_S a1, 11*SZREG(t0)
+ REG_S a1, 12*SZREG(t0)
+ REG_S a1, 13*SZREG(t0)
+ REG_S a1, 14*SZREG(t0)
+ REG_S a1, 15*SZREG(t0)
+ REG_S a1, 16*SZREG(t0)
+ REG_S a1, 17*SZREG(t0)
+ REG_S a1, 18*SZREG(t0)
+ REG_S a1, 19*SZREG(t0)
+ REG_S a1, 20*SZREG(t0)
+ REG_S a1, 21*SZREG(t0)
+ REG_S a1, 22*SZREG(t0)
+ REG_S a1, 23*SZREG(t0)
+ REG_S a1, 24*SZREG(t0)
+ REG_S a1, 25*SZREG(t0)
+ REG_S a1, 26*SZREG(t0)
+ REG_S a1, 27*SZREG(t0)
+ REG_S a1, 28*SZREG(t0)
+ REG_S a1, 29*SZREG(t0)
+ REG_S a1, 30*SZREG(t0)
+ REG_S a1, 31*SZREG(t0)
+ addi t0, t0, 32*SZREG
+ bltu t0, a3, 3b
+ andi a2, a2, SZREG-1 /* Update count */
+
+4:
+ /* Handle trailing misalignment */
+ beqz a2, 6f
+ add a3, t0, a2
+5:
+ sb a1, 0(t0)
+ addi t0, t0, 1
+ bltu t0, a3, 5b
+6:
+ ret
+END(__memset)
diff --git a/arch/riscv/lib/setjmp.S b/arch/riscv/lib/setjmp.S
index 72bc924..99d6195 100644
--- a/arch/riscv/lib/setjmp.S
+++ b/arch/riscv/lib/setjmp.S
@@ -54,12 +54,8 @@
LOAD_IDX(sp, 13)
/* Move the return value in place, but return 1 if passed 0. */
- beq a1, zero, longjmp_1
- mv a0, a1
- ret
-
- longjmp_1:
- li a0, 1
+ seqz a0, a1
+ add a0, a0, a1
ret
ENDPROC(longjmp)
.popsection
diff --git a/board/Synology/common/Makefile b/board/Synology/common/Makefile
new file mode 100644
index 0000000..62354cc
--- /dev/null
+++ b/board/Synology/common/Makefile
@@ -0,0 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (C) 2021 Phil Sutter <phil@nwl.cc>
+
+obj-y += legacy.o
diff --git a/board/Synology/common/legacy.c b/board/Synology/common/legacy.c
new file mode 100644
index 0000000..3c89e92
--- /dev/null
+++ b/board/Synology/common/legacy.c
@@ -0,0 +1,76 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2021
+ * Walter Schweizer <swwa@users.sourceforge.net>
+ * Phil Sutter <phil@nwl.cc>
+ */
+
+#include <config.h>
+#include <vsprintf.h>
+#include <env.h>
+#include <net.h>
+#include <asm/setup.h>
+
+#include "legacy.h"
+
+static unsigned int syno_board_id(void)
+{
+ switch (CONFIG_MACH_TYPE) {
+ case 527:
+ return SYNO_DS109_ID;
+ case 3036:
+ return SYNO_AXP_4BAY_2BAY;
+ default:
+ return 0;
+ }
+}
+
+static unsigned int usb_port_modes(void)
+{
+ unsigned int i, ret = 0;
+ char var[32], *val;
+
+ for (i = 0; i < USBPORT_MAX; i++) {
+ snprintf(var, 32, "usb%dMode", i);
+ val = env_get(var);
+
+ if (!val || strcasecmp(val, "host"))
+ continue;
+
+ ret |= 1 << i;
+ }
+ return ret;
+}
+
+/* Support old kernels */
+void setup_board_tags(struct tag **in_params)
+{
+ struct tag_mv_uboot *t;
+ struct tag *params;
+ int i;
+
+ debug("Synology board tags...\n");
+
+ params = *in_params;
+ t = (struct tag_mv_uboot *)¶ms->u;
+
+ t->uboot_version = VER_NUM | syno_board_id();
+ t->tclk = CONFIG_SYS_TCLK;
+ t->sysclk = CONFIG_SYS_TCLK * 2;
+ t->isusbhost = usb_port_modes();
+
+ for (i = 0; i < ETHADDR_MAX; i++) {
+ char addrvar[16], mtuvar[16];
+
+ sprintf(addrvar, i ? "eth%daddr" : "ethaddr", i);
+ sprintf(mtuvar, i ? "eth%dmtu" : "ethmtu", i);
+
+ eth_env_get_enetaddr(addrvar, t->macaddr[i]);
+ t->mtu[i] = env_get_ulong(mtuvar, 10, 0);
+ }
+
+ params->hdr.tag = ATAG_MV_UBOOT;
+ params->hdr.size = tag_size(tag_mv_uboot);
+ params = tag_next(params);
+ *in_params = params;
+}
diff --git a/board/Synology/common/legacy.h b/board/Synology/common/legacy.h
new file mode 100644
index 0000000..0a81432
--- /dev/null
+++ b/board/Synology/common/legacy.h
@@ -0,0 +1,33 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2021
+ * Walter Schweizer <swwa@users.sourceforge.net>
+ * Phil Sutter <phil@nwl.cc>
+ */
+
+#ifndef __SYNO_LEGACY_H
+#define __SYNO_LEGACY_H
+
+/* Marvell uboot parameters */
+#define ATAG_MV_UBOOT 0x41000403
+#define VER_NUM 0x03040400 /* 3.4.4 */
+
+#define BOARD_ID_BASE 0x0
+#define SYNO_DS109_ID (BOARD_ID_BASE + 0x15)
+#define SYNO_AXP_4BAY_2BAY (0xf + 1)
+
+#define ETHADDR_MAX 4
+#define USBPORT_MAX 3
+
+struct tag_mv_uboot {
+ u32 uboot_version;
+ u32 tclk;
+ u32 sysclk;
+ u32 isusbhost;
+ u8 macaddr[ETHADDR_MAX][ETH_ALEN];
+ u16 mtu[ETHADDR_MAX];
+ u32 fw_image_base;
+ u32 fw_image_size;
+};
+
+#endif /* __SYNO_LEGACY_H */
diff --git a/board/Synology/ds109/ds109.c b/board/Synology/ds109/ds109.c
index eaac954..3914faa 100644
--- a/board/Synology/ds109/ds109.c
+++ b/board/Synology/ds109/ds109.c
@@ -114,38 +114,6 @@
SOFTWARE_REBOOT);
}
-/* Support old kernels */
-void setup_board_tags(struct tag **in_params)
-{
- unsigned int boardId;
- struct tag *params;
- struct tag_mv_uboot *t;
- int i;
-
- printf("Synology board tags...");
- params = *in_params;
- t = (struct tag_mv_uboot *)¶ms->u;
-
- t->uboot_version = VER_NUM;
-
- boardId = SYNO_DS109_ID;
- t->uboot_version |= boardId;
-
- t->tclk = CONFIG_SYS_TCLK;
- t->sysclk = CONFIG_SYS_TCLK*2;
-
- t->isusbhost = 1;
- for (i = 0; i < 4; i++) {
- memset(t->macaddr[i], 0, sizeof(t->macaddr[i]));
- t->mtu[i] = 0;
- }
-
- params->hdr.tag = ATAG_MV_UBOOT;
- params->hdr.size = tag_size(tag_mv_uboot);
- params = tag_next(params);
- *in_params = params;
-}
-
#ifdef CONFIG_RESET_PHY_R
/* Configure and enable MV88E1116 PHY */
void reset_phy(void)
diff --git a/board/Synology/ds109/ds109.h b/board/Synology/ds109/ds109.h
index cc6ef99..0cf0525 100644
--- a/board/Synology/ds109/ds109.h
+++ b/board/Synology/ds109/ds109.h
@@ -23,21 +23,4 @@
#define MV88E1116_RGMII_TXTM_CTRL (1 << 4)
#define MV88E1116_RGMII_RXTM_CTRL (1 << 5)
-/* Marvell uboot parameters */
-#define ATAG_MV_UBOOT 0x41000403
-#define VER_NUM 0x03040400 /* 3.4.4 */
-#define BOARD_ID_BASE 0x0
-#define SYNO_DS109_ID (BOARD_ID_BASE+0x15)
-
-struct tag_mv_uboot {
- u32 uboot_version;
- u32 tclk;
- u32 sysclk;
- u32 isusbhost;
- char macaddr[4][6];
- u16 mtu[4];
- u32 fw_image_base;
- u32 fw_image_size;
-};
-
#endif /* __DS109_H */
diff --git a/board/Synology/ds414/Kconfig b/board/Synology/ds414/Kconfig
new file mode 100644
index 0000000..4d30852
--- /dev/null
+++ b/board/Synology/ds414/Kconfig
@@ -0,0 +1,12 @@
+if TARGET_DS414
+
+config SYS_BOARD
+ default "ds414"
+
+config SYS_VENDOR
+ default "Synology"
+
+config SYS_CONFIG_NAME
+ default "ds414"
+
+endif
diff --git a/board/Synology/ds414/cmd_syno.c b/board/Synology/ds414/cmd_syno.c
index a120c31..a62658a 100644
--- a/board/Synology/ds414/cmd_syno.c
+++ b/board/Synology/ds414/cmd_syno.c
@@ -17,12 +17,9 @@
#include <asm/io.h>
#include "../drivers/ddr/marvell/axp/ddr3_init.h"
-#define ETHADDR_MAX 4
-#define SYNO_SN_TAG "SN="
-#define SYNO_CHKSUM_TAG "CHK="
+#include "cmd_syno.h"
-
-static int do_syno_populate(int argc, char *const argv[])
+int do_syno_populate(int argc, char *const argv[])
{
unsigned int bus = CONFIG_SF_DEFAULT_BUS;
unsigned int cs = CONFIG_SF_DEFAULT_CS;
@@ -57,7 +54,7 @@
goto out_unmap;
}
- for (n = 0; n < ETHADDR_MAX; n++) {
+ for (n = 0; n < SYNO_ETHADDR_MAX; n++) {
char ethaddr[ETH_ALEN];
int i, sum = 0;
unsigned char csum = 0;
diff --git a/board/Synology/ds414/cmd_syno.h b/board/Synology/ds414/cmd_syno.h
new file mode 100644
index 0000000..42e435c
--- /dev/null
+++ b/board/Synology/ds414/cmd_syno.h
@@ -0,0 +1,17 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Commands to deal with Synology specifics.
+ *
+ * Copyright (C) 2021 Phil Sutter <phil@nwl.cc>
+ */
+
+#ifndef _CMD_SYNO_H
+#define _CMD_SYNO_H
+
+#define SYNO_ETHADDR_MAX 4
+#define SYNO_SN_TAG "SN="
+#define SYNO_CHKSUM_TAG "CHK="
+
+int do_syno_populate(int argc, char *const argv[]);
+
+#endif /* _CMD_SYNO_H */
diff --git a/board/Synology/ds414/ds414.c b/board/Synology/ds414/ds414.c
index 9c4ce67..abe6f9e 100644
--- a/board/Synology/ds414/ds414.c
+++ b/board/Synology/ds414/ds414.c
@@ -18,6 +18,8 @@
#include "../arch/arm/mach-mvebu/serdes/axp/high_speed_env_spec.h"
#include "../arch/arm/mach-mvebu/serdes/axp/board_env_spec.h"
+#include "cmd_syno.h"
+
DECLARE_GLOBAL_DATA_PTR;
/* GPP and MPP settings as found in mvBoardEnvSpec.c of Synology's U-Boot */
@@ -176,6 +178,15 @@
pwr_mng_ctrl_reg &= ~(BIT(29) | BIT(30)); /* SATA1 link and core */
reg_write(POWER_MNG_CTRL_REG, pwr_mng_ctrl_reg);
+ return 0;
+}
+
+int misc_init_r(void)
+{
+ if (!env_get("ethaddr")) {
+ puts("Incomplete environment, populating from SPI flash\n");
+ do_syno_populate(0, NULL);
+ }
return 0;
}
diff --git a/board/freescale/imx8mp_evk/lpddr4_timing.c b/board/freescale/imx8mp_evk/lpddr4_timing.c
old mode 100755
new mode 100644
diff --git a/board/sifive/fu540/MAINTAINERS b/board/sifive/fu540/MAINTAINERS
deleted file mode 100644
index 2762072..0000000
--- a/board/sifive/fu540/MAINTAINERS
+++ /dev/null
@@ -1,10 +0,0 @@
-SiFive FU540 BOARD
-M: Paul Walmsley <paul.walmsley@sifive.com>
-M: Palmer Dabbelt <palmer@dabbelt.com>
-M: Anup Patel <anup.patel@wdc.com>
-M: Atish Patra <atish.patra@wdc.com>
-S: Maintained
-F: board/sifive/fu540/
-F: doc/board/sifive/fu540.rst
-F: include/configs/sifive-fu540.h
-F: configs/sifive_fu540_defconfig
diff --git a/board/sifive/fu540/Kconfig b/board/sifive/unleashed/Kconfig
similarity index 91%
rename from board/sifive/fu540/Kconfig
rename to board/sifive/unleashed/Kconfig
index 64fdbd4..dbffd59 100644
--- a/board/sifive/fu540/Kconfig
+++ b/board/sifive/unleashed/Kconfig
@@ -1,7 +1,7 @@
-if TARGET_SIFIVE_FU540
+if TARGET_SIFIVE_UNLEASHED
config SYS_BOARD
- default "fu540"
+ default "unleashed"
config SYS_VENDOR
default "sifive"
@@ -10,7 +10,7 @@
default "fu540"
config SYS_CONFIG_NAME
- default "sifive-fu540"
+ default "sifive-unleashed"
config SYS_TEXT_BASE
default 0x80200000 if SPL
diff --git a/board/sifive/unleashed/MAINTAINERS b/board/sifive/unleashed/MAINTAINERS
new file mode 100644
index 0000000..2ea0074
--- /dev/null
+++ b/board/sifive/unleashed/MAINTAINERS
@@ -0,0 +1,10 @@
+SiFive HiFive Unleashed BOARD
+M: Paul Walmsley <paul.walmsley@sifive.com>
+M: Palmer Dabbelt <palmer@dabbelt.com>
+M: Anup Patel <anup.patel@wdc.com>
+M: Atish Patra <atish.patra@wdc.com>
+S: Maintained
+F: board/sifive/unleashed/
+F: doc/board/sifive/unleashed.rst
+F: include/configs/sifive-unleashed.h
+F: configs/sifive_unleashed_defconfig
diff --git a/board/sifive/fu540/Makefile b/board/sifive/unleashed/Makefile
similarity index 87%
rename from board/sifive/fu540/Makefile
rename to board/sifive/unleashed/Makefile
index b05e2f5..5821679 100644
--- a/board/sifive/fu540/Makefile
+++ b/board/sifive/unleashed/Makefile
@@ -2,7 +2,7 @@
#
# Copyright (c) 2019 Western Digital Corporation or its affiliates.
-obj-y += fu540.o
+obj-y += unleashed.o
ifdef CONFIG_SPL_BUILD
obj-y += spl.o
diff --git a/board/sifive/fu540/spl.c b/board/sifive/unleashed/spl.c
similarity index 100%
rename from board/sifive/fu540/spl.c
rename to board/sifive/unleashed/spl.c
diff --git a/board/sifive/fu540/fu540.c b/board/sifive/unleashed/unleashed.c
similarity index 100%
rename from board/sifive/fu540/fu540.c
rename to board/sifive/unleashed/unleashed.c
diff --git a/board/sipeed/maix/Kconfig b/board/sipeed/maix/Kconfig
index 2cdea8e..adf6abb 100644
--- a/board/sipeed/maix/Kconfig
+++ b/board/sipeed/maix/Kconfig
@@ -69,4 +69,6 @@
imply EFI_PARTITION
imply CMD_PART
imply CMD_FS_GENERIC
+ imply WDT
+ imply DESIGNWARE_WATCHDOG
endif
diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index 0711cbf..0f528f3 100644
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -330,7 +330,8 @@
ARCH_MX6 || ARCH_MX7 || \
ARCH_ROCKCHIP || ARCH_MVEBU || ARCH_SOCFPGA || \
ARCH_AT91 || ARCH_ZYNQ || ARCH_KEYSTONE || OMAP34XX || \
- OMAP44XX || OMAP54XX || AM33XX || AM43XX || TARGET_SIFIVE_FU540
+ OMAP44XX || OMAP54XX || AM33XX || AM43XX || \
+ TARGET_SIFIVE_UNLEASHED
help
Use sector number for specifying U-Boot location on MMC/SD in
raw mode.
@@ -347,7 +348,7 @@
default 0x300 if ARCH_ZYNQ || ARCH_KEYSTONE || OMAP34XX || OMAP44XX || \
OMAP54XX || AM33XX || AM43XX || ARCH_K3
default 0x4000 if ARCH_ROCKCHIP
- default 0x822 if TARGET_SIFIVE_FU540
+ default 0x822 if TARGET_SIFIVE_UNLEASHED
help
Address on the MMC to load U-Boot from, when the MMC is being used
in raw mode. Units: MMC sectors (1 sector = 512 bytes).
diff --git a/configs/ds414_defconfig b/configs/ds414_defconfig
index 3e6dcec..e1c0f69 100644
--- a/configs/ds414_defconfig
+++ b/configs/ds414_defconfig
@@ -20,11 +20,11 @@
CONFIG_DEBUG_UART=y
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
-CONFIG_BOOTARGS="console=ttyS0,115200"
-CONFIG_USE_PREBOOT=y
-CONFIG_PREBOOT="usb start; sf probe"
+CONFIG_BOOTARGS="console=ttyS0,115200 ip=off initrd=0x8000040,8M root=/dev/md0 rw syno_hw_version=DS414r1 ihd_num=4 netif_num=2 flash_size=8 SataLedSpecial=1 HddHotplug=1"
+# CONFIG_USE_PREBOOT is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_MISC_INIT_R=y
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_I2C=y
@@ -47,7 +47,6 @@
CONFIG_USE_ENV_SPI_MAX_HZ=y
CONFIG_ENV_SPI_MAX_HZ=50000000
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_OF_TRANSLATE=y
CONFIG_BLK=y
# CONFIG_MMC is not set
@@ -65,5 +64,8 @@
CONFIG_KIRKWOOD_SPI=y
CONFIG_USB=y
CONFIG_DM_USB=y
+CONFIG_USB_XHCI_HCD=y
+# CONFIG_USB_XHCI_MVEBU is not set
+CONFIG_USB_XHCI_PCI=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y
diff --git a/configs/microchip_mpfs_icicle_defconfig b/configs/microchip_mpfs_icicle_defconfig
index 0c15c3b..1cb2920 100644
--- a/configs/microchip_mpfs_icicle_defconfig
+++ b/configs/microchip_mpfs_icicle_defconfig
@@ -1,4 +1,5 @@
CONFIG_RISCV=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_ENV_SIZE=0x2000
CONFIG_DEFAULT_DEVICE_TREE="microchip-mpfs-icicle-kit"
CONFIG_TARGET_MICROCHIP_ICICLE=y
diff --git a/configs/sheevaplug_defconfig b/configs/sheevaplug_defconfig
index 34da356..65d8dff 100644
--- a/configs/sheevaplug_defconfig
+++ b/configs/sheevaplug_defconfig
@@ -40,6 +40,8 @@
CONFIG_NETCONSOLE=y
CONFIG_DM=y
CONFIG_MVSATA_IDE=y
+CONFIG_DM_MMC=y
+CONFIG_MVEBU_MMC=y
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
CONFIG_MVGBE=y
diff --git a/configs/sifive_fu540_defconfig b/configs/sifive_unleashed_defconfig
similarity index 95%
rename from configs/sifive_fu540_defconfig
rename to configs/sifive_unleashed_defconfig
index cabd3b1..62416a7 100644
--- a/configs/sifive_fu540_defconfig
+++ b/configs/sifive_unleashed_defconfig
@@ -8,7 +8,7 @@
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI_SUPPORT=y
CONFIG_DEFAULT_DEVICE_TREE="hifive-unleashed-a00"
-CONFIG_TARGET_SIFIVE_FU540=y
+CONFIG_TARGET_SIFIVE_UNLEASHED=y
CONFIG_ARCH_RV64I=y
CONFIG_RISCV_SMODE=y
CONFIG_DISTRO_DEFAULTS=y
diff --git a/configs/sipeed_maix_smode_defconfig b/configs/sipeed_maix_smode_defconfig
index 2516bb7..c20c389 100644
--- a/configs/sipeed_maix_smode_defconfig
+++ b/configs/sipeed_maix_smode_defconfig
@@ -1,10 +1,21 @@
CONFIG_RISCV=y
CONFIG_SYS_TEXT_BASE=0x80020000
+CONFIG_ENV_SIZE=0x1000
+CONFIG_ENV_OFFSET=0xfff000
+CONFIG_ENV_SECT_SIZE=0x1000
CONFIG_TARGET_SIPEED_MAIX=y
CONFIG_ARCH_RV64I=y
CONFIG_RISCV_SMODE=y
CONFIG_STACK_SIZE=0x100000
+CONFIG_USE_BOOTCOMMAND=y
+CONFIG_BOOTCOMMAND="run k210_bootcmd"
+CONFIG_HUSH_PARSER=y
+CONFIG_MTDIDS_DEFAULT="nor0=spi3:0"
+CONFIG_MTDPARTS_DEFAULT="nor0:1M(u-boot),0x1000@0xfff000(env)"
# CONFIG_NET is not set
# CONFIG_INPUT is not set
+CONFIG_SF_DEFAULT_BUS=3
# CONFIG_DM_ETH is not set
+CONFIG_FS_EXT4=y
+CONFIG_FS_FAT=y
# CONFIG_EFI_UNICODE_CAPITALIZATION is not set
diff --git a/configs/turris_omnia_defconfig b/configs/turris_omnia_defconfig
index 4b8843d..a8218da 100644
--- a/configs/turris_omnia_defconfig
+++ b/configs/turris_omnia_defconfig
@@ -46,11 +46,13 @@
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
CONFIG_CMD_TFTPPUT=y
+CONFIG_CMD_WDT=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
CONFIG_CMD_AES=y
CONFIG_CMD_HASH=y
CONFIG_CMD_BTRFS=y
+CONFIG_CMD_FS_UUID=y
# CONFIG_SPL_PARTITION_UUIDS is not set
CONFIG_ENV_OVERWRITE=y
CONFIG_USE_ENV_SPI_MAX_HZ=y
@@ -73,6 +75,8 @@
CONFIG_PCI=y
CONFIG_PCI_MVEBU=y
CONFIG_SCSI=y
+CONFIG_DM_RTC=y
+CONFIG_RTC_ARMADA38X=y
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_SYS_NS16550=y
CONFIG_KIRKWOOD_SPI=y
diff --git a/doc/board/sifive/index.rst b/doc/board/sifive/index.rst
index ad614c9..ed7eacf 100644
--- a/doc/board/sifive/index.rst
+++ b/doc/board/sifive/index.rst
@@ -6,4 +6,4 @@
.. toctree::
:maxdepth: 2
- fu540
+ unleashed
diff --git a/doc/board/sifive/fu540.rst b/doc/board/sifive/unleashed.rst
similarity index 100%
rename from doc/board/sifive/fu540.rst
rename to doc/board/sifive/unleashed.rst
diff --git a/drivers/clk/microchip/mpfs_clk.c b/drivers/clk/microchip/mpfs_clk.c
index 722c79b..05d7647 100644
--- a/drivers/clk/microchip/mpfs_clk.c
+++ b/drivers/clk/microchip/mpfs_clk.c
@@ -120,4 +120,5 @@
.ops = &mpfs_clk_ops,
.probe = mpfs_clk_probe,
.priv_auto = sizeof(struct clk),
+ .flags = DM_FLAG_PRE_RELOC,
};
diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig
index 4925675..197aa82 100644
--- a/drivers/mmc/Kconfig
+++ b/drivers/mmc/Kconfig
@@ -327,6 +327,15 @@
If unsure, say N.
+config MVEBU_MMC
+ bool "Kirkwood MMC controller support"
+ depends on DM_MMC && BLK && ARCH_KIRKWOOD
+ help
+ Support for MMC host controller on Kirkwood SoCs.
+ If you are on a Kirkwood architecture, say Y here.
+
+ If unsure, say N.
+
config PXA_MMC_GENERIC
bool "Support for MMC controllers on PXA"
help
diff --git a/drivers/mmc/mvebu_mmc.c b/drivers/mmc/mvebu_mmc.c
index 8ec1f57..fea55c6 100644
--- a/drivers/mmc/mvebu_mmc.c
+++ b/drivers/mmc/mvebu_mmc.c
@@ -11,60 +11,67 @@
#include <errno.h>
#include <log.h>
#include <malloc.h>
+#include <dm.h>
+#include <fdtdec.h>
#include <part.h>
#include <mmc.h>
-#include <asm/global_data.h>
#include <asm/io.h>
#include <asm/arch/cpu.h>
#include <asm/arch/soc.h>
#include <mvebu_mmc.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-#define DRIVER_NAME "MVEBU_MMC"
+#include <dm/device_compat.h>
#define MVEBU_TARGET_DRAM 0
#define TIMEOUT_DELAY 5*CONFIG_SYS_HZ /* wait 5 seconds */
-static void mvebu_mmc_write(u32 offs, u32 val)
+static inline void *get_regbase(const struct mmc *mmc)
{
- writel(val, CONFIG_SYS_MMC_BASE + (offs));
+ struct mvebu_mmc_plat *pdata = mmc->priv;
+
+ return pdata->iobase;
}
-static u32 mvebu_mmc_read(u32 offs)
+static void mvebu_mmc_write(const struct mmc *mmc, u32 offs, u32 val)
{
- return readl(CONFIG_SYS_MMC_BASE + (offs));
+ writel(val, get_regbase(mmc) + (offs));
}
-static int mvebu_mmc_setup_data(struct mmc_data *data)
+static u32 mvebu_mmc_read(const struct mmc *mmc, u32 offs)
{
+ return readl(get_regbase(mmc) + (offs));
+}
+
+static int mvebu_mmc_setup_data(struct udevice *dev, struct mmc_data *data)
+{
+ struct mvebu_mmc_plat *pdata = dev_get_plat(dev);
+ struct mmc *mmc = &pdata->mmc;
u32 ctrl_reg;
- debug("%s, data %s : blocks=%d blksz=%d\n", DRIVER_NAME,
- (data->flags & MMC_DATA_READ) ? "read" : "write",
- data->blocks, data->blocksize);
+ dev_dbg(dev, "data %s : blocks=%d blksz=%d\n",
+ (data->flags & MMC_DATA_READ) ? "read" : "write",
+ data->blocks, data->blocksize);
/* default to maximum timeout */
- ctrl_reg = mvebu_mmc_read(SDIO_HOST_CTRL);
+ ctrl_reg = mvebu_mmc_read(mmc, SDIO_HOST_CTRL);
ctrl_reg |= SDIO_HOST_CTRL_TMOUT(SDIO_HOST_CTRL_TMOUT_MAX);
- mvebu_mmc_write(SDIO_HOST_CTRL, ctrl_reg);
+ mvebu_mmc_write(mmc, SDIO_HOST_CTRL, ctrl_reg);
if (data->flags & MMC_DATA_READ) {
- mvebu_mmc_write(SDIO_SYS_ADDR_LOW, (u32)data->dest & 0xffff);
- mvebu_mmc_write(SDIO_SYS_ADDR_HI, (u32)data->dest >> 16);
+ mvebu_mmc_write(mmc, SDIO_SYS_ADDR_LOW, (u32)data->dest & 0xffff);
+ mvebu_mmc_write(mmc, SDIO_SYS_ADDR_HI, (u32)data->dest >> 16);
} else {
- mvebu_mmc_write(SDIO_SYS_ADDR_LOW, (u32)data->src & 0xffff);
- mvebu_mmc_write(SDIO_SYS_ADDR_HI, (u32)data->src >> 16);
+ mvebu_mmc_write(mmc, SDIO_SYS_ADDR_LOW, (u32)data->src & 0xffff);
+ mvebu_mmc_write(mmc, SDIO_SYS_ADDR_HI, (u32)data->src >> 16);
}
- mvebu_mmc_write(SDIO_BLK_COUNT, data->blocks);
- mvebu_mmc_write(SDIO_BLK_SIZE, data->blocksize);
+ mvebu_mmc_write(mmc, SDIO_BLK_COUNT, data->blocks);
+ mvebu_mmc_write(mmc, SDIO_BLK_SIZE, data->blocksize);
return 0;
}
-static int mvebu_mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd,
+static int mvebu_mmc_send_cmd(struct udevice *dev, struct mmc_cmd *cmd,
struct mmc_data *data)
{
ulong start;
@@ -72,12 +79,14 @@
ushort resptype = 0;
ushort xfertype = 0;
ushort resp_indx = 0;
+ struct mvebu_mmc_plat *pdata = dev_get_plat(dev);
+ struct mmc *mmc = &pdata->mmc;
- debug("%s: cmdidx [0x%x] resp_type[0x%x] cmdarg[0x%x]\n",
- DRIVER_NAME, cmd->cmdidx, cmd->resp_type, cmd->cmdarg);
+ dev_dbg(dev, "cmdidx [0x%x] resp_type[0x%x] cmdarg[0x%x]\n",
+ cmd->cmdidx, cmd->resp_type, cmd->cmdarg);
- debug("%s: cmd %d (hw state 0x%04x)\n", DRIVER_NAME,
- cmd->cmdidx, mvebu_mmc_read(SDIO_HW_STATE));
+ dev_dbg(dev, "cmd %d (hw state 0x%04x)\n",
+ cmd->cmdidx, mvebu_mmc_read(mmc, SDIO_HW_STATE));
/*
* Hardware weirdness. The FIFO_EMPTY bit of the HW_STATE
@@ -88,26 +97,26 @@
* this bit comes to good sense (which eventually happens by
* itself) then the new transfer simply fails with a timeout.
*/
- if (!(mvebu_mmc_read(SDIO_HW_STATE) & CMD_FIFO_EMPTY)) {
+ if (!(mvebu_mmc_read(mmc, SDIO_HW_STATE) & CMD_FIFO_EMPTY)) {
ushort hw_state, count = 0;
start = get_timer(0);
do {
- hw_state = mvebu_mmc_read(SDIO_HW_STATE);
+ hw_state = mvebu_mmc_read(mmc, SDIO_HW_STATE);
if ((get_timer(0) - start) > TIMEOUT_DELAY) {
printf("%s : FIFO_EMPTY bit missing\n",
- DRIVER_NAME);
+ dev->name);
break;
}
count++;
} while (!(hw_state & CMD_FIFO_EMPTY));
- debug("%s *** wait for FIFO_EMPTY bit (hw=0x%04x, count=%d, jiffies=%ld)\n",
- DRIVER_NAME, hw_state, count, (get_timer(0) - (start)));
+ dev_dbg(dev, "*** wait for FIFO_EMPTY bit (hw=0x%04x, count=%d, jiffies=%ld)\n",
+ hw_state, count, (get_timer(0) - (start)));
}
/* Clear status */
- mvebu_mmc_write(SDIO_NOR_INTR_STATUS, SDIO_POLL_MASK);
- mvebu_mmc_write(SDIO_ERR_INTR_STATUS, SDIO_POLL_MASK);
+ mvebu_mmc_write(mmc, SDIO_NOR_INTR_STATUS, SDIO_POLL_MASK);
+ mvebu_mmc_write(mmc, SDIO_ERR_INTR_STATUS, SDIO_POLL_MASK);
resptype = SDIO_CMD_INDEX(cmd->cmdidx);
@@ -133,11 +142,10 @@
}
if (data) {
- int err = mvebu_mmc_setup_data(data);
+ int err = mvebu_mmc_setup_data(dev, data);
if (err) {
- debug("%s: command DATA error :%x\n",
- DRIVER_NAME, err);
+ dev_dbg(dev, "command DATA error :%x\n", err);
return err;
}
@@ -154,34 +162,33 @@
}
/* Setting cmd arguments */
- mvebu_mmc_write(SDIO_ARG_LOW, cmd->cmdarg & 0xffff);
- mvebu_mmc_write(SDIO_ARG_HI, cmd->cmdarg >> 16);
+ mvebu_mmc_write(mmc, SDIO_ARG_LOW, cmd->cmdarg & 0xffff);
+ mvebu_mmc_write(mmc, SDIO_ARG_HI, cmd->cmdarg >> 16);
/* Setting Xfer mode */
- mvebu_mmc_write(SDIO_XFER_MODE, xfertype);
+ mvebu_mmc_write(mmc, SDIO_XFER_MODE, xfertype);
/* Sending command */
- mvebu_mmc_write(SDIO_CMD, resptype);
+ mvebu_mmc_write(mmc, SDIO_CMD, resptype);
start = get_timer(0);
- while (!((mvebu_mmc_read(SDIO_NOR_INTR_STATUS)) & waittype)) {
- if (mvebu_mmc_read(SDIO_NOR_INTR_STATUS) & SDIO_NOR_ERROR) {
- debug("%s: error! cmdidx : %d, err reg: %04x\n",
- DRIVER_NAME, cmd->cmdidx,
- mvebu_mmc_read(SDIO_ERR_INTR_STATUS));
- if (mvebu_mmc_read(SDIO_ERR_INTR_STATUS) &
+ while (!((mvebu_mmc_read(mmc, SDIO_NOR_INTR_STATUS)) & waittype)) {
+ if (mvebu_mmc_read(mmc, SDIO_NOR_INTR_STATUS) & SDIO_NOR_ERROR) {
+ dev_dbg(dev, "error! cmdidx : %d, err reg: %04x\n",
+ cmd->cmdidx,
+ mvebu_mmc_read(mmc, SDIO_ERR_INTR_STATUS));
+ if (mvebu_mmc_read(mmc, SDIO_ERR_INTR_STATUS) &
(SDIO_ERR_CMD_TIMEOUT | SDIO_ERR_DATA_TIMEOUT)) {
- debug("%s: command READ timed out\n",
- DRIVER_NAME);
+ dev_dbg(dev, "command READ timed out\n");
return -ETIMEDOUT;
}
- debug("%s: command READ error\n", DRIVER_NAME);
+ dev_dbg(dev, "command READ error\n");
return -ECOMM;
}
if ((get_timer(0) - start) > TIMEOUT_DELAY) {
- debug("%s: command timed out\n", DRIVER_NAME);
+ dev_dbg(dev, "command timed out\n");
return -ETIMEDOUT;
}
}
@@ -191,8 +198,7 @@
uint response[8];
for (resp_indx = 0; resp_indx < 8; resp_indx++)
- response[resp_indx]
- = mvebu_mmc_read(SDIO_RSP(resp_indx));
+ response[resp_indx] = mvebu_mmc_read(mmc, SDIO_RSP(resp_indx));
cmd->response[0] = ((response[0] & 0x03ff) << 22) |
((response[1] & 0xffff) << 6) |
@@ -209,8 +215,7 @@
uint response[3];
for (resp_indx = 0; resp_indx < 3; resp_indx++)
- response[resp_indx]
- = mvebu_mmc_read(SDIO_RSP(resp_indx));
+ response[resp_indx] = mvebu_mmc_read(mmc, SDIO_RSP(resp_indx));
cmd->response[0] = ((response[2] & 0x003f) << (8 - 8)) |
((response[1] & 0xffff) << (14 - 8)) |
@@ -225,64 +230,71 @@
cmd->response[3] = 0;
}
- debug("%s: resp[0x%x] ", DRIVER_NAME, cmd->resp_type);
+ dev_dbg(dev, "resp[0x%x] ", cmd->resp_type);
debug("[0x%x] ", cmd->response[0]);
debug("[0x%x] ", cmd->response[1]);
debug("[0x%x] ", cmd->response[2]);
debug("[0x%x] ", cmd->response[3]);
debug("\n");
- if (mvebu_mmc_read(SDIO_ERR_INTR_STATUS) &
+ if (mvebu_mmc_read(mmc, SDIO_ERR_INTR_STATUS) &
(SDIO_ERR_CMD_TIMEOUT | SDIO_ERR_DATA_TIMEOUT))
return -ETIMEDOUT;
return 0;
}
-static void mvebu_mmc_power_up(void)
+static void mvebu_mmc_power_up(struct udevice *dev)
{
- debug("%s: power up\n", DRIVER_NAME);
+ struct mvebu_mmc_plat *pdata = dev_get_plat(dev);
+ struct mmc *mmc = &pdata->mmc;
+
+ dev_dbg(dev, "power up\n");
/* disable interrupts */
- mvebu_mmc_write(SDIO_NOR_INTR_EN, 0);
- mvebu_mmc_write(SDIO_ERR_INTR_EN, 0);
+ mvebu_mmc_write(mmc, SDIO_NOR_INTR_EN, 0);
+ mvebu_mmc_write(mmc, SDIO_ERR_INTR_EN, 0);
/* SW reset */
- mvebu_mmc_write(SDIO_SW_RESET, SDIO_SW_RESET_NOW);
+ mvebu_mmc_write(mmc, SDIO_SW_RESET, SDIO_SW_RESET_NOW);
- mvebu_mmc_write(SDIO_XFER_MODE, 0);
+ mvebu_mmc_write(mmc, SDIO_XFER_MODE, 0);
/* enable status */
- mvebu_mmc_write(SDIO_NOR_STATUS_EN, SDIO_POLL_MASK);
- mvebu_mmc_write(SDIO_ERR_STATUS_EN, SDIO_POLL_MASK);
+ mvebu_mmc_write(mmc, SDIO_NOR_STATUS_EN, SDIO_POLL_MASK);
+ mvebu_mmc_write(mmc, SDIO_ERR_STATUS_EN, SDIO_POLL_MASK);
/* enable interrupts status */
- mvebu_mmc_write(SDIO_NOR_INTR_STATUS, SDIO_POLL_MASK);
- mvebu_mmc_write(SDIO_ERR_INTR_STATUS, SDIO_POLL_MASK);
+ mvebu_mmc_write(mmc, SDIO_NOR_INTR_STATUS, SDIO_POLL_MASK);
+ mvebu_mmc_write(mmc, SDIO_ERR_INTR_STATUS, SDIO_POLL_MASK);
}
-static void mvebu_mmc_set_clk(unsigned int clock)
+static void mvebu_mmc_set_clk(struct udevice *dev, unsigned int clock)
{
unsigned int m;
+ struct mvebu_mmc_plat *pdata = dev_get_plat(dev);
+ struct mmc *mmc = &pdata->mmc;
if (clock == 0) {
- debug("%s: clock off\n", DRIVER_NAME);
- mvebu_mmc_write(SDIO_XFER_MODE, SDIO_XFER_MODE_STOP_CLK);
- mvebu_mmc_write(SDIO_CLK_DIV, MVEBU_MMC_BASE_DIV_MAX);
+ dev_dbg(dev, "clock off\n");
+ mvebu_mmc_write(mmc, SDIO_XFER_MODE, SDIO_XFER_MODE_STOP_CLK);
+ mvebu_mmc_write(mmc, SDIO_CLK_DIV, MVEBU_MMC_BASE_DIV_MAX);
} else {
m = MVEBU_MMC_BASE_FAST_CLOCK/(2*clock) - 1;
if (m > MVEBU_MMC_BASE_DIV_MAX)
m = MVEBU_MMC_BASE_DIV_MAX;
- mvebu_mmc_write(SDIO_CLK_DIV, m & MVEBU_MMC_BASE_DIV_MAX);
- debug("%s: clock (%d) div : %d\n", DRIVER_NAME, clock, m);
+ mvebu_mmc_write(mmc, SDIO_CLK_DIV, m & MVEBU_MMC_BASE_DIV_MAX);
+ dev_dbg(dev, "clock (%d) div : %d\n", clock, m);
}
}
-static void mvebu_mmc_set_bus(unsigned int bus)
+static void mvebu_mmc_set_bus(struct udevice *dev, unsigned int bus)
{
+ struct mvebu_mmc_plat *pdata = dev_get_plat(dev);
+ struct mmc *mmc = &pdata->mmc;
u32 ctrl_reg = 0;
- ctrl_reg = mvebu_mmc_read(SDIO_HOST_CTRL);
+ ctrl_reg = mvebu_mmc_read(mmc, SDIO_HOST_CTRL);
ctrl_reg &= ~SDIO_HOST_CTRL_DATA_WIDTH_4_BITS;
switch (bus) {
@@ -306,23 +318,26 @@
ctrl_reg |= SDIO_HOST_CTRL_CARD_TYPE_MEM_ONLY;
- debug("%s: ctrl 0x%04x: %s %s %s\n", DRIVER_NAME, ctrl_reg,
- (ctrl_reg & SDIO_HOST_CTRL_PUSH_PULL_EN) ?
- "push-pull" : "open-drain",
- (ctrl_reg & SDIO_HOST_CTRL_DATA_WIDTH_4_BITS) ?
- "4bit-width" : "1bit-width",
- (ctrl_reg & SDIO_HOST_CTRL_HI_SPEED_EN) ?
- "high-speed" : "");
+ dev_dbg(dev, "ctrl 0x%04x: %s %s %s\n", ctrl_reg,
+ (ctrl_reg & SDIO_HOST_CTRL_PUSH_PULL_EN) ?
+ "push-pull" : "open-drain",
+ (ctrl_reg & SDIO_HOST_CTRL_DATA_WIDTH_4_BITS) ?
+ "4bit-width" : "1bit-width",
+ (ctrl_reg & SDIO_HOST_CTRL_HI_SPEED_EN) ?
+ "high-speed" : "");
- mvebu_mmc_write(SDIO_HOST_CTRL, ctrl_reg);
+ mvebu_mmc_write(mmc, SDIO_HOST_CTRL, ctrl_reg);
}
-static int mvebu_mmc_set_ios(struct mmc *mmc)
+static int mvebu_mmc_set_ios(struct udevice *dev)
{
- debug("%s: bus[%d] clock[%d]\n", DRIVER_NAME,
- mmc->bus_width, mmc->clock);
- mvebu_mmc_set_bus(mmc->bus_width);
- mvebu_mmc_set_clk(mmc->clock);
+ struct mvebu_mmc_plat *pdata = dev_get_plat(dev);
+ struct mmc *mmc = &pdata->mmc;
+
+ dev_dbg(dev, "bus[%d] clock[%d]\n",
+ mmc->bus_width, mmc->clock);
+ mvebu_mmc_set_bus(dev, mmc->bus_width);
+ mvebu_mmc_set_clk(dev, mmc->clock);
return 0;
}
@@ -330,13 +345,13 @@
/*
* Set window register.
*/
-static void mvebu_window_setup(void)
+static void mvebu_window_setup(const struct mmc *mmc)
{
int i;
for (i = 0; i < 4; i++) {
- mvebu_mmc_write(WINDOW_CTRL(i), 0);
- mvebu_mmc_write(WINDOW_BASE(i), 0);
+ mvebu_mmc_write(mmc, WINDOW_CTRL(i), 0);
+ mvebu_mmc_write(mmc, WINDOW_BASE(i), 0);
}
for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
u32 size, base, attrib;
@@ -364,79 +379,119 @@
size = gd->bd->bi_dram[i].size;
base = gd->bd->bi_dram[i].start;
if (size && attrib) {
- mvebu_mmc_write(WINDOW_CTRL(i),
+ mvebu_mmc_write(mmc, WINDOW_CTRL(i),
MVCPU_WIN_CTRL_DATA(size,
MVEBU_TARGET_DRAM,
attrib,
MVCPU_WIN_ENABLE));
} else {
- mvebu_mmc_write(WINDOW_CTRL(i), MVCPU_WIN_DISABLE);
+ mvebu_mmc_write(mmc, WINDOW_CTRL(i), MVCPU_WIN_DISABLE);
}
- mvebu_mmc_write(WINDOW_BASE(i), base);
+ mvebu_mmc_write(mmc, WINDOW_BASE(i), base);
}
}
-static int mvebu_mmc_initialize(struct mmc *mmc)
+static int mvebu_mmc_initialize(struct udevice *dev)
{
- debug("%s: mvebu_mmc_initialize\n", DRIVER_NAME);
+ struct mvebu_mmc_plat *pdata = dev_get_plat(dev);
+ struct mmc *mmc = &pdata->mmc;
+
+ dev_dbg(dev, "%s\n", __func__);
/*
* Setting host parameters
* Initial Host Ctrl : Timeout : max , Normal Speed mode,
* 4-bit data mode, Big Endian, SD memory Card, Push_pull CMD Line
*/
- mvebu_mmc_write(SDIO_HOST_CTRL,
+ mvebu_mmc_write(mmc, SDIO_HOST_CTRL,
SDIO_HOST_CTRL_TMOUT(SDIO_HOST_CTRL_TMOUT_MAX) |
SDIO_HOST_CTRL_DATA_WIDTH_4_BITS |
SDIO_HOST_CTRL_BIG_ENDIAN |
SDIO_HOST_CTRL_PUSH_PULL_EN |
SDIO_HOST_CTRL_CARD_TYPE_MEM_ONLY);
- mvebu_mmc_write(SDIO_CLK_CTRL, 0);
+ mvebu_mmc_write(mmc, SDIO_CLK_CTRL, 0);
/* enable status */
- mvebu_mmc_write(SDIO_NOR_STATUS_EN, SDIO_POLL_MASK);
- mvebu_mmc_write(SDIO_ERR_STATUS_EN, SDIO_POLL_MASK);
+ mvebu_mmc_write(mmc, SDIO_NOR_STATUS_EN, SDIO_POLL_MASK);
+ mvebu_mmc_write(mmc, SDIO_ERR_STATUS_EN, SDIO_POLL_MASK);
/* disable interrupts */
- mvebu_mmc_write(SDIO_NOR_INTR_EN, 0);
- mvebu_mmc_write(SDIO_ERR_INTR_EN, 0);
+ mvebu_mmc_write(mmc, SDIO_NOR_INTR_EN, 0);
+ mvebu_mmc_write(mmc, SDIO_ERR_INTR_EN, 0);
- mvebu_window_setup();
+ mvebu_window_setup(mmc);
/* SW reset */
- mvebu_mmc_write(SDIO_SW_RESET, SDIO_SW_RESET_NOW);
+ mvebu_mmc_write(mmc, SDIO_SW_RESET, SDIO_SW_RESET_NOW);
return 0;
}
-static const struct mmc_ops mvebu_mmc_ops = {
- .send_cmd = mvebu_mmc_send_cmd,
- .set_ios = mvebu_mmc_set_ios,
- .init = mvebu_mmc_initialize,
-};
+static int mvebu_mmc_of_to_plat(struct udevice *dev)
+{
+ struct mvebu_mmc_plat *pdata = dev_get_plat(dev);
+ fdt_addr_t addr;
-static struct mmc_config mvebu_mmc_cfg = {
- .name = DRIVER_NAME,
- .ops = &mvebu_mmc_ops,
- .f_min = MVEBU_MMC_BASE_FAST_CLOCK / MVEBU_MMC_BASE_DIV_MAX,
- .f_max = MVEBU_MMC_CLOCKRATE_MAX,
- .voltages = MMC_VDD_32_33 | MMC_VDD_33_34,
- .host_caps = MMC_MODE_4BIT | MMC_MODE_HS |
- MMC_MODE_HS_52MHz,
- .part_type = PART_TYPE_DOS,
- .b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT,
-};
+ addr = dev_read_addr(dev);
+ if (addr == FDT_ADDR_T_NONE)
+ return -EINVAL;
-int mvebu_mmc_init(struct bd_info *bis)
+ pdata->iobase = (void *)addr;
+
+ return 0;
+}
+
+static int mvebu_mmc_probe(struct udevice *dev)
{
- struct mmc *mmc;
+ struct mvebu_mmc_plat *pdata = dev_get_plat(dev);
+ struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
+ struct mmc *mmc = &pdata->mmc;
+ struct mmc_config *cfg = &pdata->cfg;
- mvebu_mmc_power_up();
+ cfg->name = dev->name;
+ cfg->f_min = MVEBU_MMC_BASE_FAST_CLOCK / MVEBU_MMC_BASE_DIV_MAX;
+ cfg->f_max = MVEBU_MMC_CLOCKRATE_MAX;
+ cfg->voltages = MMC_VDD_32_33 | MMC_VDD_33_34;
+ cfg->host_caps = MMC_MODE_4BIT | MMC_MODE_HS | MMC_MODE_HS_52MHz;
+ cfg->part_type = PART_TYPE_DOS;
+ cfg->b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT;
- mmc = mmc_create(&mvebu_mmc_cfg, bis);
- if (mmc == NULL)
- return -1;
+ mmc->cfg = cfg;
+ mmc->priv = pdata;
+ mmc->dev = dev;
+ upriv->mmc = mmc;
+
+ mvebu_mmc_power_up(dev);
+ mvebu_mmc_initialize(dev);
return 0;
}
+
+static const struct dm_mmc_ops mvebu_dm_mmc_ops = {
+ .send_cmd = mvebu_mmc_send_cmd,
+ .set_ios = mvebu_mmc_set_ios,
+};
+
+static int mvebu_mmc_bind(struct udevice *dev)
+{
+ struct mvebu_mmc_plat *pdata = dev_get_plat(dev);
+
+ return mmc_bind(dev, &pdata->mmc, &pdata->cfg);
+}
+
+static const struct udevice_id mvebu_mmc_match[] = {
+ { .compatible = "marvell,orion-sdio" },
+ { /* sentinel */ }
+};
+
+U_BOOT_DRIVER(mvebu_mmc) = {
+ .name = "mvebu_mmc",
+ .id = UCLASS_MMC,
+ .of_match = mvebu_mmc_match,
+ .ops = &mvebu_dm_mmc_ops,
+ .probe = mvebu_mmc_probe,
+ .bind = mvebu_mmc_bind,
+ .of_to_plat = mvebu_mmc_of_to_plat,
+ .plat_auto = sizeof(struct mvebu_mmc_plat),
+};
diff --git a/drivers/ram/sifive/Kconfig b/drivers/ram/sifive/Kconfig
index 6aca22a..08de692 100644
--- a/drivers/ram/sifive/Kconfig
+++ b/drivers/ram/sifive/Kconfig
@@ -8,6 +8,6 @@
config SIFIVE_FU540_DDR
bool "SiFive FU540 DDR driver"
depends on RAM_SIFIVE
- default y if TARGET_SIFIVE_FU540
+ default y if TARGET_SIFIVE_UNLEASHED
help
This enables DDR support for the platforms based on SiFive FU540 SoC.
diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
index f5b3f88..019565f 100644
--- a/drivers/reset/Kconfig
+++ b/drivers/reset/Kconfig
@@ -166,7 +166,7 @@
config RESET_SIFIVE
bool "Reset Driver for SiFive SoC's"
- depends on DM_RESET && CLK_SIFIVE_FU540_PRCI && TARGET_SIFIVE_FU540
+ depends on DM_RESET && CLK_SIFIVE_FU540_PRCI && TARGET_SIFIVE_UNLEASHED
default y
help
PRCI module within SiFive SoC's provides mechanism to reset
diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig
index aa6d901..dafba35 100644
--- a/drivers/rtc/Kconfig
+++ b/drivers/rtc/Kconfig
@@ -38,6 +38,13 @@
Some real-time clocks support the output of 32kHz square waves (such as ds3231),
the config symbol choose Real Time Clock device 32Khz output feature.
+config RTC_ARMADA38X
+ bool "Enable Armada 38x Marvell SoC RTC"
+ depends on DM_RTC && ARCH_MVEBU
+ help
+ This adds support for the in-chip RTC that can be found in the
+ Armada 38x Marvell's SoC devices.
+
config RTC_PCF2127
bool "Enable PCF2127 driver"
depends on DM_RTC
diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile
index 6a45a9c..15609e7 100644
--- a/drivers/rtc/Makefile
+++ b/drivers/rtc/Makefile
@@ -8,6 +8,7 @@
obj-$(CONFIG_RTC_AT91SAM9_RTT) += at91sam9_rtt.o
obj-y += rtc-lib.o
+obj-$(CONFIG_RTC_ARMADA38X) += armada38x.o
obj-$(CONFIG_RTC_DAVINCI) += davinci.o
obj-$(CONFIG_RTC_DS1302) += ds1302.o
obj-$(CONFIG_RTC_DS1306) += ds1306.o
diff --git a/drivers/rtc/armada38x.c b/drivers/rtc/armada38x.c
new file mode 100644
index 0000000..2d264ac
--- /dev/null
+++ b/drivers/rtc/armada38x.c
@@ -0,0 +1,184 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * RTC driver for the Armada 38x Marvell SoCs
+ *
+ * Copyright (C) 2021 Marek Behun <marek.behun@nic.cz>
+ *
+ * Based on Linux' driver by Gregory Clement and Marvell
+ */
+
+#include <asm/io.h>
+#include <dm.h>
+#include <linux/delay.h>
+#include <rtc.h>
+
+#define RTC_STATUS 0x0
+#define RTC_TIME 0xC
+#define RTC_CONF_TEST 0x1C
+
+/* Armada38x SoC registers */
+#define RTC_38X_BRIDGE_TIMING_CTL 0x0
+#define RTC_38X_PERIOD_OFFS 0
+#define RTC_38X_PERIOD_MASK (0x3FF << RTC_38X_PERIOD_OFFS)
+#define RTC_38X_READ_DELAY_OFFS 26
+#define RTC_38X_READ_DELAY_MASK (0x1F << RTC_38X_READ_DELAY_OFFS)
+
+#define SAMPLE_NR 100
+
+struct armada38x_rtc {
+ void __iomem *regs;
+ void __iomem *regs_soc;
+};
+
+/*
+ * According to Erratum RES-3124064 we have to do some configuration in MBUS.
+ * To read an RTC register we need to read it 100 times and return the most
+ * frequent value.
+ * To write an RTC register we need to write 2x zero into STATUS register,
+ * followed by the proper write. Linux adds an 5 us delay after this, so we do
+ * it here as well.
+ */
+static void update_38x_mbus_timing_params(struct armada38x_rtc *rtc)
+{
+ u32 reg;
+
+ reg = readl(rtc->regs_soc + RTC_38X_BRIDGE_TIMING_CTL);
+ reg &= ~RTC_38X_PERIOD_MASK;
+ reg |= 0x3FF << RTC_38X_PERIOD_OFFS; /* Maximum value */
+ reg &= ~RTC_38X_READ_DELAY_MASK;
+ reg |= 0x1F << RTC_38X_READ_DELAY_OFFS; /* Maximum value */
+ writel(reg, rtc->regs_soc + RTC_38X_BRIDGE_TIMING_CTL);
+}
+
+static void armada38x_rtc_write(u32 val, struct armada38x_rtc *rtc, u8 reg)
+{
+ writel(0, rtc->regs + RTC_STATUS);
+ writel(0, rtc->regs + RTC_STATUS);
+ writel(val, rtc->regs + reg);
+ udelay(5);
+}
+
+static u32 armada38x_rtc_read(struct armada38x_rtc *rtc, u8 reg)
+{
+ u8 counts[SAMPLE_NR], max_idx;
+ u32 samples[SAMPLE_NR], max;
+ int i, j, last;
+
+ for (i = 0, last = 0; i < SAMPLE_NR; ++i) {
+ u32 sample = readl(rtc->regs + reg);
+
+ /* find if this value was already read */
+ for (j = 0; j < last; ++j) {
+ if (samples[j] == sample)
+ break;
+ }
+
+ if (j < last) {
+ /* if yes, increment count */
+ ++counts[j];
+ } else {
+ /* if not, add */
+ samples[last] = sample;
+ counts[last] = 1;
+ ++last;
+ }
+ }
+
+ /* finally find the sample that was read the most */
+ max = 0;
+ max_idx = 0;
+
+ for (i = 0; i < last; ++i) {
+ if (counts[i] > max) {
+ max = counts[i];
+ max_idx = i;
+ }
+ }
+
+ return samples[max_idx];
+}
+
+static int armada38x_rtc_get(struct udevice *dev, struct rtc_time *tm)
+{
+ struct armada38x_rtc *rtc = dev_get_priv(dev);
+ u32 time;
+
+ time = armada38x_rtc_read(rtc, RTC_TIME);
+
+ rtc_to_tm(time, tm);
+
+ return 0;
+}
+
+static int armada38x_rtc_reset(struct udevice *dev)
+{
+ struct armada38x_rtc *rtc = dev_get_priv(dev);
+ u32 reg;
+
+ reg = armada38x_rtc_read(rtc, RTC_CONF_TEST);
+
+ if (reg & 0xff) {
+ armada38x_rtc_write(0, rtc, RTC_CONF_TEST);
+ mdelay(500);
+ armada38x_rtc_write(0, rtc, RTC_TIME);
+ armada38x_rtc_write(BIT(0) | BIT(1), 0, RTC_STATUS);
+ }
+
+ return 0;
+}
+
+static int armada38x_rtc_set(struct udevice *dev, const struct rtc_time *tm)
+{
+ struct armada38x_rtc *rtc = dev_get_priv(dev);
+ unsigned long time;
+
+ time = rtc_mktime(tm);
+
+ if (time > U32_MAX)
+ printf("%s: requested time to set will overflow\n", dev->name);
+
+ armada38x_rtc_reset(dev);
+ armada38x_rtc_write(time, rtc, RTC_TIME);
+
+ return 0;
+}
+
+static int armada38x_probe(struct udevice *dev)
+{
+ struct armada38x_rtc *rtc = dev_get_priv(dev);
+
+ rtc->regs = dev_remap_addr_name(dev, "rtc");
+ if (!rtc->regs)
+ goto err;
+
+ rtc->regs_soc = dev_remap_addr_name(dev, "rtc-soc");
+ if (!rtc->regs_soc)
+ goto err;
+
+ update_38x_mbus_timing_params(rtc);
+
+ return 0;
+err:
+ printf("%s: io address missing\n", dev->name);
+ return -ENODEV;
+}
+
+static const struct rtc_ops armada38x_rtc_ops = {
+ .get = armada38x_rtc_get,
+ .set = armada38x_rtc_set,
+ .reset = armada38x_rtc_reset,
+};
+
+static const struct udevice_id armada38x_rtc_ids[] = {
+ { .compatible = "marvell,armada-380-rtc", .data = 0 },
+ { }
+};
+
+U_BOOT_DRIVER(rtc_armada38x) = {
+ .name = "rtc-armada38x",
+ .id = UCLASS_RTC,
+ .of_match = armada38x_rtc_ids,
+ .probe = armada38x_probe,
+ .priv_auto = sizeof(struct armada38x_rtc),
+ .ops = &armada38x_rtc_ops,
+};
diff --git a/drivers/timer/sifive_clint_timer.c b/drivers/timer/sifive_clint_timer.c
index de7b4b9..939b99d 100644
--- a/drivers/timer/sifive_clint_timer.c
+++ b/drivers/timer/sifive_clint_timer.c
@@ -54,6 +54,7 @@
static const struct udevice_id sifive_clint_ids[] = {
{ .compatible = "riscv,clint0" },
+ { .compatible = "sifive,clint0" },
{ }
};
diff --git a/drivers/watchdog/designware_wdt.c b/drivers/watchdog/designware_wdt.c
index c020324..9e54871 100644
--- a/drivers/watchdog/designware_wdt.c
+++ b/drivers/watchdog/designware_wdt.c
@@ -9,7 +9,6 @@
#include <reset.h>
#include <wdt.h>
#include <asm/io.h>
-#include <asm/utils.h>
#include <linux/bitops.h>
#define DW_WDT_CR 0x00
@@ -35,7 +34,7 @@
signed int i;
/* calculate the timeout range value */
- i = log_2_n_round_up(timeout * clk_khz) - 16;
+ i = fls(timeout * clk_khz - 1) - 16;
i = clamp(i, 0, 15);
writel(i | (i << 4), base + DW_WDT_TORR);
@@ -130,27 +129,39 @@
if (ret)
return ret;
+ ret = clk_enable(&clk);
+ if (ret)
+ goto err;
+
priv->clk_khz = clk_get_rate(&clk) / 1000;
- if (!priv->clk_khz)
- return -EINVAL;
+ if (!priv->clk_khz) {
+ ret = -EINVAL;
+ goto err;
+ }
#else
priv->clk_khz = CONFIG_DW_WDT_CLOCK_KHZ;
#endif
-#if CONFIG_IS_ENABLED(DM_RESET)
- struct reset_ctl_bulk resets;
+ if (CONFIG_IS_ENABLED(DM_RESET)) {
+ struct reset_ctl_bulk resets;
- ret = reset_get_bulk(dev, &resets);
- if (ret)
- return ret;
+ ret = reset_get_bulk(dev, &resets);
+ if (ret)
+ goto err;
- ret = reset_deassert_bulk(&resets);
- if (ret)
- return ret;
-#endif
+ ret = reset_deassert_bulk(&resets);
+ if (ret)
+ goto err;
+ }
/* reset to disable the watchdog */
return designware_wdt_stop(dev);
+
+err:
+#if CONFIG_IS_ENABLED(CLK)
+ clk_free(&clk);
+#endif
+ return ret;
}
static const struct wdt_ops designware_wdt_ops = {
diff --git a/include/configs/clearfog.h b/include/configs/clearfog.h
index 5441da8..c9852a7 100644
--- a/include/configs/clearfog.h
+++ b/include/configs/clearfog.h
@@ -19,11 +19,6 @@
*/
#define CONFIG_SYS_TCLK 250000000 /* 250MHz */
-/*
- * SDIO/MMC Card Configuration
- */
-#define CONFIG_SYS_MMC_BASE MVEBU_SDIO_BASE
-
/* USB/EHCI configuration */
#define CONFIG_EHCI_IS_TDI
diff --git a/include/configs/controlcenterdc.h b/include/configs/controlcenterdc.h
index f53d48d..869b94b 100644
--- a/include/configs/controlcenterdc.h
+++ b/include/configs/controlcenterdc.h
@@ -25,11 +25,6 @@
#define CONFIG_LOADADDR 1000000
/*
- * SDIO/MMC Card Configuration
- */
-#define CONFIG_SYS_MMC_BASE MVEBU_SDIO_BASE
-
-/*
* SATA/SCSI/AHCI configuration
*/
#define CONFIG_SCSI_AHCI_PLAT
diff --git a/include/configs/db-88f6820-gp.h b/include/configs/db-88f6820-gp.h
index d4207be..ed851bc 100644
--- a/include/configs/db-88f6820-gp.h
+++ b/include/configs/db-88f6820-gp.h
@@ -20,11 +20,6 @@
#define CONFIG_SYS_I2C_SPEED 100000
/*
- * SDIO/MMC Card Configuration
- */
-#define CONFIG_SYS_MMC_BASE MVEBU_SDIO_BASE
-
-/*
* SATA/SCSI/AHCI configuration
*/
#define CONFIG_SCSI_AHCI_PLAT
diff --git a/include/configs/ds109.h b/include/configs/ds109.h
index 1f033ab..35d8536 100644
--- a/include/configs/ds109.h
+++ b/include/configs/ds109.h
@@ -44,7 +44,8 @@
"x_bootcmd_kernel=fatload usb 0 0x6400000 uImage\0" \
"x_bootargs=console=ttyS0,115200\0" \
"x_bootargs_root=root=/dev/sda2 rootdelay=10\0" \
- "ipaddr=192.168.1.5\0"
+ "ipaddr=192.168.1.5\0" \
+ "usb0Mode=host\0"
/*
* Ethernet Driver configuration
diff --git a/include/configs/ds414.h b/include/configs/ds414.h
index 8aa2d47..c8b4506 100644
--- a/include/configs/ds414.h
+++ b/include/configs/ds414.h
@@ -6,6 +6,9 @@
#ifndef _CONFIG_SYNOLOGY_DS414_H
#define _CONFIG_SYNOLOGY_DS414_H
+/* Vendor kernel expects this MACH_TYPE */
+#define CONFIG_MACH_TYPE 3036
+
/*
* High Level Configuration Options (easy to change)
*/
@@ -74,8 +77,23 @@
#define CONFIG_DDR_32BIT
/* Default Environment */
-#define CONFIG_BOOTCOMMAND "sf read ${loadaddr} 0xd0000 0x700000; bootm"
#define CONFIG_LOADADDR 0x80000
+#define CONFIG_BOOTCOMMAND \
+ "sf probe; " \
+ "sf read ${loadaddr} 0xd0000 0x2d0000; " \
+ "sf read ${ramdisk_addr_r} 0x3a0000 0x430000; " \
+ "bootm ${loadaddr} ${ramdisk_addr_r}"
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "initrd_high=0xffffffff\0" \
+ "ramdisk_addr_r=0x8000000\0" \
+ "usb0Mode=host\0usb1Mode=host\0usb2Mode=device\0" \
+ "ethmtu=1500\0eth1mtu=1500\0" \
+ "update_uboot=sf probe; dhcp; " \
+ "mw.b ${loadaddr} 0x0 0xd0000; " \
+ "tftpboot ${loadaddr} u-boot-spl.kwb; " \
+ "sf update ${loadaddr} 0x0 0xd0000\0"
+
/* increase autoneg timeout, my NIC sucks */
#define PHY_ANEG_TIMEOUT 16000
diff --git a/include/configs/helios4.h b/include/configs/helios4.h
index 396870a..2cda05c 100644
--- a/include/configs/helios4.h
+++ b/include/configs/helios4.h
@@ -19,11 +19,6 @@
*/
#define CONFIG_SYS_TCLK 250000000 /* 250MHz */
-/*
- * SDIO/MMC Card Configuration
- */
-#define CONFIG_SYS_MMC_BASE MVEBU_SDIO_BASE
-
/* USB/EHCI configuration */
#define CONFIG_EHCI_IS_TDI
diff --git a/include/configs/openrd.h b/include/configs/openrd.h
index e9fd0fc..03b9393 100644
--- a/include/configs/openrd.h
+++ b/include/configs/openrd.h
@@ -74,9 +74,4 @@
#define CONFIG_SYS_ATA_IDE1_OFFSET MV_SATA_PORT1_OFFSET
#endif /*CONFIG_MVSATA_IDE*/
-#ifdef CONFIG_CMD_MMC
-#define CONFIG_MVEBU_MMC
-#define CONFIG_SYS_MMC_BASE KW_SDIO_BASE
-#endif /* CONFIG_CMD_MMC */
-
#endif /* _CONFIG_OPENRD_BASE_H */
diff --git a/include/configs/sheevaplug.h b/include/configs/sheevaplug.h
index e1f8fb8..abe8418 100644
--- a/include/configs/sheevaplug.h
+++ b/include/configs/sheevaplug.h
@@ -51,14 +51,6 @@
#endif /* CONFIG_CMD_NET */
/*
- * SDIO/MMC Card Configuration
- */
-#ifdef CONFIG_CMD_MMC
-#define CONFIG_MVEBU_MMC
-#define CONFIG_SYS_MMC_BASE KW_SDIO_BASE
-#endif /* CONFIG_CMD_MMC */
-
-/*
* SATA driver configuration
*/
#ifdef CONFIG_IDE
diff --git a/include/configs/sifive-fu540.h b/include/configs/sifive-unleashed.h
similarity index 100%
rename from include/configs/sifive-fu540.h
rename to include/configs/sifive-unleashed.h
diff --git a/include/configs/sipeed-maix.h b/include/configs/sipeed-maix.h
index 08acb25..4c1ff98 100644
--- a/include/configs/sipeed-maix.h
+++ b/include/configs/sipeed-maix.h
@@ -18,9 +18,6 @@
/* Don't relocate into AI ram since it isn't set up yet */
#define CONFIG_SYS_SDRAM_SIZE (SZ_4M + SZ_2M)
-/* For early init */
-#define K210_SYSCTL_BASE 0x50440000
-
#ifndef CONFIG_EXTRA_ENV_SETTINGS
#define CONFIG_EXTRA_ENV_SETTINGS \
"loadaddr=0x80060000\0" \
diff --git a/include/mvebu_mmc.h b/include/mvebu_mmc.h
index a35e5a1..e75c3fa 100644
--- a/include/mvebu_mmc.h
+++ b/include/mvebu_mmc.h
@@ -258,17 +258,10 @@
/* Hardware reset */
#define MMC_CAP_HW_RESET (1 << 31)
-struct mvebu_mmc_cfg {
- u32 mvebu_mmc_base;
- u32 mvebu_mmc_clk;
- u8 max_bus_width;
+struct mvebu_mmc_plat {
+ void *iobase;
struct mmc_config cfg;
+ struct mmc mmc;
};
-/*
- * Functions prototypes
- */
-
-int mvebu_mmc_init(struct bd_info *bis);
-
#endif /* __MVEBU_MMC_H__ */
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index b693925..6859d17 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -1076,7 +1076,6 @@
CONFIG_MTD_UBI_MODULE
CONFIG_MULTI_CS
CONFIG_MUSB_HOST
-CONFIG_MVEBU_MMC
CONFIG_MVGBE_PORTS
CONFIG_MVMFP_V2
CONFIG_MVS
@@ -2906,7 +2905,6 @@
CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR
CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS
CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR
-CONFIG_SYS_MMC_BASE
CONFIG_SYS_MMC_CD_PIN
CONFIG_SYS_MMC_CLK_OD
CONFIG_SYS_MMC_MAX_BLK_COUNT
diff --git a/test/lib/Makefile b/test/lib/Makefile
index 97c11e3..a30f615 100644
--- a/test/lib/Makefile
+++ b/test/lib/Makefile
@@ -7,6 +7,7 @@
obj-$(CONFIG_EFI_SECURE_BOOT) += efi_image_region.o
obj-y += hexdump.o
obj-y += lmb.o
+obj-y += longjmp.o
obj-$(CONFIG_CONSOLE_RECORD) += test_print.o
obj-$(CONFIG_SSCANF) += sscanf.o
obj-y += string.o
diff --git a/test/lib/longjmp.c b/test/lib/longjmp.c
new file mode 100644
index 0000000..201367a
--- /dev/null
+++ b/test/lib/longjmp.c
@@ -0,0 +1,73 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Test setjmp(), longjmp()
+ *
+ * Copyright (c) 2021, Heinrich Schuchardt <xypron.glpk@gmx.de>
+ */
+
+#include <common.h>
+#include <test/lib.h>
+#include <test/test.h>
+#include <test/ut.h>
+#include <asm/setjmp.h>
+
+struct test_jmp_buf {
+ jmp_buf env;
+ int val;
+};
+
+/**
+ * test_longjmp() - test longjmp function
+ *
+ * @i is passed to longjmp.
+ * @i << 8 is set in the environment structure.
+ *
+ * @env: environment
+ * @i: value passed to longjmp()
+ */
+static noinline void test_longjmp(struct test_jmp_buf *env, int i)
+{
+ env->val = i << 8;
+ longjmp(env->env, i);
+}
+
+/**
+ * test_setjmp() - test setjmp function
+ *
+ * setjmp() will return the value @i passed to longjmp() if @i is non-zero.
+ * For @i == 0 we expect return value 1.
+ *
+ * @i << 8 will be set by test_longjmp in the environment structure.
+ * This value can be used to check that the stack frame is restored.
+ *
+ * We return the XORed values to allow simply check both at once.
+ *
+ * @i: value passed to longjmp()
+ * Return: values return by longjmp()
+ */
+static int test_setjmp(int i)
+{
+ struct test_jmp_buf env;
+ int ret;
+
+ env.val = -1;
+ ret = setjmp(env.env);
+ if (ret)
+ return ret ^ env.val;
+ test_longjmp(&env, i);
+ /* We should not arrive here */
+ return 0x1000;
+}
+
+static int lib_test_longjmp(struct unit_test_state *uts)
+{
+ int i;
+
+ for (i = -3; i < 0; ++i)
+ ut_asserteq(i ^ (i << 8), test_setjmp(i));
+ ut_asserteq(1, test_setjmp(0));
+ for (i = 1; i < 4; ++i)
+ ut_asserteq(i ^ (i << 8), test_setjmp(i));
+ return 0;
+}
+LIB_TEST(lib_test_longjmp, 0);