dm: pci: fsl: Correct the workaround of erratum A-007815
The register to enable/disable the write-permission of DBI RO
registers should be accessed via the CFG_ADDR/CFG_DATA registers
instead of accessing directly.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
diff --git a/drivers/pci/pcie_fsl.h b/drivers/pci/pcie_fsl.h
index dc8368d..70c5f4e 100644
--- a/drivers/pci/pcie_fsl.h
+++ b/drivers/pci/pcie_fsl.h
@@ -26,6 +26,8 @@
/* PCIe Link Status Register */
#define PCI_LSR (FSL_PCIE_CAP_ID + 0x12)
+#define DBI_RO_WR_EN 0x8bc
+
#ifndef CONFIG_SYS_PCI_MEMORY_BUS
#define CONFIG_SYS_PCI_MEMORY_BUS 0
#endif