Add PCI support for MPC8568MDS board
This patch is against u-boot-mpc85xx.git of www.denx.com
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Ebony Zhu <ebony.zhu@freescale.com>
diff --git a/include/asm-ppc/immap_85xx.h b/include/asm-ppc/immap_85xx.h
index 77f885d..3d4816f 100644
--- a/include/asm-ppc/immap_85xx.h
+++ b/include/asm-ppc/immap_85xx.h
@@ -1522,6 +1522,17 @@
char res58[60176];
} ccsr_rio_t;
+/* Quick Engine Block Pin Muxing Registers (0xe_0100 - 0xe_01bf) */
+typedef struct par_io {
+ uint cpodr; /* 0x100 */
+ uint cpdat; /* 0x104 */
+ uint cpdir1; /* 0x108 */
+ uint cpdir2; /* 0x10c */
+ uint cppar1; /* 0x110 */
+ uint cppar2; /* 0x114 */
+ char res[8];
+}par_io_t;
+
/*
* Global Utilities Register Block(0xe_0000-0xf_ffff)
*/
@@ -1585,7 +1596,13 @@
uint svr; /* 0xe00a4 - System version register */
char res10a[8];
uint rstcr; /* 0xe00b0 - Reset control register */
+#ifdef MPC8568
+ char res10b[76];
+ par_io_t qe_par_io[7]; /* 0xe0100 - 0xe01bf */
+ char res10c[3136];
+#else
char res10b[3404];
+#endif
uint clkocr; /* 0xe0e00 - Clock out select register */
char res11[12];
uint ddrdllcr; /* 0xe0e10 - DDR DLL control register */
diff --git a/include/configs/MPC8568MDS.h b/include/configs/MPC8568MDS.h
index eef168c..5bc953a 100644
--- a/include/configs/MPC8568MDS.h
+++ b/include/configs/MPC8568MDS.h
@@ -33,7 +33,7 @@
#define CONFIG_MPC8568 1 /* MPC8568 specific */
#define CONFIG_MPC8568MDS 1 /* MPC8568MDS board specific */
-#undef CONFIG_PCI
+#define CONFIG_PCI
#define CONFIG_TSEC_ENET /* tsec ethernet support */
#define CONFIG_ENV_OVERWRITE
#define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup*/
@@ -306,11 +306,14 @@
#define CONFIG_FSL_I2C /* Use FSL common I2C driver */
#define CONFIG_HARD_I2C /* I2C with hardware support*/
#undef CONFIG_SOFT_I2C /* I2C bit-banged */
+#define CONFIG_I2C_MULTI_BUS
+#define CONFIG_I2C_CMD_TREE
#define CFG_I2C_SPEED 400000 /* I2C speed and slave address */
-#define CFG_I2C_EEPROM_ADDR 0x57
+#define CFG_I2C_EEPROM_ADDR 0x52
#define CFG_I2C_SLAVE 0x7F
-#define CFG_I2C_NOPROBES {0x69} /* Don't probe these addrs */
+#define CFG_I2C_NOPROBES {0,0x69} /* Don't probe these addrs */
#define CFG_I2C_OFFSET 0x3000
+#define CFG_I2C2_OFFSET 0x3100
/*
* General PCI
@@ -318,7 +321,7 @@
*/
#define CFG_PCI1_MEM_BASE 0x80000000
#define CFG_PCI1_MEM_PHYS CFG_PCI1_MEM_BASE
-#define CFG_PCI1_MEM_SIZE 0x10000000 /* 256M */
+#define CFG_PCI1_MEM_SIZE 0x20000000 /* 512M */
#define CFG_PCI1_IO_BASE 0x00000000
#define CFG_PCI1_IO_PHYS 0xe2000000
#define CFG_PCI1_IO_SIZE 0x00800000 /* 8M */