diff --git a/arch/arm/mach-zynqmp/Makefile b/arch/arm/mach-zynqmp/Makefile
index 3f25554..8f897a3 100644
--- a/arch/arm/mach-zynqmp/Makefile
+++ b/arch/arm/mach-zynqmp/Makefile
@@ -3,8 +3,7 @@
 # (C) Copyright 2014 - 2015 Xilinx, Inc.
 # Michal Simek <michal.simek@amd.com>
 
-obj-y	+= clk.o
-obj-y	+= cpu.o
+obj-y	+= aes.o clk.o cpu.o
 obj-$(CONFIG_MP)	+= mp.o
 obj-$(CONFIG_SPL_BUILD) += spl.o handoff.o psu_spl_init.o
 obj-$(CONFIG_SPL_ZYNQMP_DRAM_ECC_INIT) += ecc_spl_init.o
diff --git a/arch/arm/mach-zynqmp/aes.c b/arch/arm/mach-zynqmp/aes.c
new file mode 100644
index 0000000..8a2b7fd
--- /dev/null
+++ b/arch/arm/mach-zynqmp/aes.c
@@ -0,0 +1,59 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * (C) Copyright 2018 Xilinx, Inc.
+ * Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
+ *
+ * Copyright (C) 2023 Weidmueller Interface GmbH & Co. KG <oss@weidmueller.com>
+ * Christian Taedcke <christian.taedcke@weidmueller.com>
+ */
+
+#include <common.h>
+#include <mach/zynqmp_aes.h>
+
+#include <asm/arch/sys_proto.h>
+#include <cpu_func.h>
+#include <memalign.h>
+#include <zynqmp_firmware.h>
+
+int zynqmp_aes_operation(struct zynqmp_aes *aes)
+{
+	u32 ret_payload[PAYLOAD_ARG_CNT];
+	int ret;
+
+	if (zynqmp_firmware_version() <= PMUFW_V1_0)
+		return -ENOENT;
+
+	if (aes->srcaddr && aes->ivaddr && aes->dstaddr) {
+		flush_dcache_range(aes->srcaddr,
+				   aes->srcaddr +
+				   roundup(aes->len, ARCH_DMA_MINALIGN));
+		flush_dcache_range(aes->ivaddr,
+				   aes->ivaddr +
+				   roundup(IV_SIZE, ARCH_DMA_MINALIGN));
+		flush_dcache_range(aes->dstaddr,
+				   aes->dstaddr +
+				   roundup(aes->len, ARCH_DMA_MINALIGN));
+	}
+
+	if (aes->keysrc == 0) {
+		if (aes->keyaddr == 0)
+			return -EINVAL;
+
+		flush_dcache_range(aes->keyaddr,
+				   aes->keyaddr +
+				   roundup(KEY_PTR_LEN, ARCH_DMA_MINALIGN));
+	}
+
+	flush_dcache_range((ulong)aes, (ulong)(aes) +
+			   roundup(sizeof(struct zynqmp_aes), ARCH_DMA_MINALIGN));
+
+	ret = xilinx_pm_request(PM_SECURE_AES, upper_32_bits((ulong)aes),
+				lower_32_bits((ulong)aes), 0, 0, ret_payload);
+	if (ret || ret_payload[1]) {
+		printf("Failed: AES op status:0x%x, errcode:0x%x\n",
+		       ret, ret_payload[1]);
+		return -EIO;
+	}
+
+	return 0;
+}
diff --git a/arch/arm/mach-zynqmp/include/mach/zynqmp_aes.h b/arch/arm/mach-zynqmp/include/mach/zynqmp_aes.h
new file mode 100644
index 0000000..2a9cffb
--- /dev/null
+++ b/arch/arm/mach-zynqmp/include/mach/zynqmp_aes.h
@@ -0,0 +1,32 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2023 Weidmueller Interface GmbH & Co. KG <oss@weidmueller.com>
+ * Christian Taedcke <christian.taedcke@weidmueller.com>
+ *
+ * Declaration of AES operation functionality for ZynqMP.
+ */
+
+#ifndef ZYNQMP_AES_H
+#define ZYNQMP_AES_H
+
+struct zynqmp_aes {
+	u64 srcaddr;
+	u64 ivaddr;
+	u64 keyaddr;
+	u64 dstaddr;
+	u64 len;
+	u64 op;
+	u64 keysrc;
+};
+
+/**
+ * zynqmp_aes_operation() - Performs an aes operation using the pmu firmware
+ *
+ * @aes: The aes operation buffer that must have been allocated using
+ *       ALLOC_CACHE_ALIGN_BUFFER(struct zynqmp_aes, aes, 1)
+ *
+ * Return: 0 in case of success, in case of an error any other value
+ */
+int zynqmp_aes_operation(struct zynqmp_aes *aes);
+
+#endif /* ZYNQMP_AES_H */
diff --git a/board/xilinx/zynqmp/cmds.c b/board/xilinx/zynqmp/cmds.c
index ea404d5..fadb0ed 100644
--- a/board/xilinx/zynqmp/cmds.c
+++ b/board/xilinx/zynqmp/cmds.c
@@ -14,16 +14,7 @@
 #include <asm/arch/hardware.h>
 #include <asm/arch/sys_proto.h>
 #include <asm/io.h>
-
-struct aes {
-	u64 srcaddr;
-	u64 ivaddr;
-	u64 keyaddr;
-	u64 dstaddr;
-	u64 len;
-	u64 op;
-	u64 keysrc;
-};
+#include <mach/zynqmp_aes.h>
 
 static int do_zynqmp_verify_secure(struct cmd_tbl *cmdtp, int flag, int argc,
 				   char *const argv[])
@@ -121,9 +112,7 @@
 static int do_zynqmp_aes(struct cmd_tbl *cmdtp, int flag, int argc,
 			 char * const argv[])
 {
-	ALLOC_CACHE_ALIGN_BUFFER(struct aes, aes, 1);
-	int ret;
-	u32 ret_payload[PAYLOAD_ARG_CNT];
+	ALLOC_CACHE_ALIGN_BUFFER(struct zynqmp_aes, aes, 1);
 
 	if (zynqmp_firmware_version() <= PMUFW_V1_0) {
 		puts("ERR: PMUFW v1.0 or less is detected\n");
@@ -142,40 +131,14 @@
 	aes->keysrc = hextoul(argv[6], NULL);
 	aes->dstaddr = hextoul(argv[7], NULL);
 
-	if (aes->srcaddr && aes->ivaddr && aes->dstaddr) {
-		flush_dcache_range(aes->srcaddr,
-				   (aes->srcaddr +
-				    roundup(aes->len, ARCH_DMA_MINALIGN)));
-		flush_dcache_range(aes->ivaddr,
-				   (aes->ivaddr +
-				    roundup(IV_SIZE, ARCH_DMA_MINALIGN)));
-		flush_dcache_range(aes->dstaddr,
-				   (aes->dstaddr +
-				    roundup(aes->len, ARCH_DMA_MINALIGN)));
-	}
-
 	if (aes->keysrc == 0) {
 		if (argc < cmdtp->maxargs)
 			return CMD_RET_USAGE;
 
 		aes->keyaddr = hextoul(argv[8], NULL);
-		if (aes->keyaddr)
-			flush_dcache_range(aes->keyaddr,
-					   (aes->keyaddr +
-					    roundup(KEY_PTR_LEN,
-						    ARCH_DMA_MINALIGN)));
 	}
 
-	flush_dcache_range((ulong)aes, (ulong)(aes) +
-			   roundup(sizeof(struct aes), ARCH_DMA_MINALIGN));
-
-	ret = xilinx_pm_request(PM_SECURE_AES, upper_32_bits((ulong)aes),
-				lower_32_bits((ulong)aes), 0, 0, ret_payload);
-	if (ret || ret_payload[1])
-		printf("Failed: AES op status:0x%x, errcode:0x%x\n",
-		       ret, ret_payload[1]);
-
-	return ret;
+	return zynqmp_aes_operation(aes);
 }
 
 #ifdef CONFIG_DEFINE_TCM_OCM_MMAP