commit c46693815d64d2645dc54890b3fe9858a77eda48
author Parthiban Nallathambi <parthitce@gmail.com> Wed Apr 10 16:35:32 2019 +0200
committer Stefano Babic <sbabic@denx.de> Tue Jun 11 10:42:48 2019 +0200
tree 52888bed76f733a23bca33be63a02e7829a6c720
parent 6bf487b28f5ab59f89858d64c81fbf7eca166371

imx: Extend PCL063 support for phyCORE-i.MX6ULL SOM

Extend PHYTEC phyBOARD-i.MX6UL for phyCORE-i.MX6UL SoM (PCL063)
with eMMC on SoM.

CPU:   Freescale i.MX6ULL rev1.0 792 MHz (running at 396 MHz)
CPU:   Industrial temperature grade (-40C to 105C) at 38C
Reset cause: POR
Model: Phytec phyBOARD-i.MX6ULL-Segin SBC
Board: PHYTEC phyCORE-i.MX6ULL
DRAM:  256 MiB
MMC:   FSL_SDHC: 0, FSL_SDHC: 1
In:    serial@02020000
Out:   serial@02020000
Err:   serial@02020000
Net:   FEC0

Working:
 - Eth0
 - i2C
 - MMC/SD
 - eMMC
 - UART (1 & 5)
 - USB (host & otg)

Signed-off-by: Parthiban Nallathambi <parthitce@gmail.com>

board/phytec/pcl063/Kconfig

diff --git a/board/phytec/pcl063/Kconfig b/board/phytec/pcl063/Kconfig
index 977db70..58f72f2 100644
--- a/board/phytec/pcl063/Kconfig
+++ b/board/phytec/pcl063/Kconfig
@@ -10,3 +10,16 @@
 	default "pcl063"
 
 endif
+
+if TARGET_PCL063_ULL
+
+config SYS_BOARD
+	default "pcl063"
+
+config SYS_VENDOR
+	default "phytec"
+
+config SYS_CONFIG_NAME
+	default "pcl063_ull"
+
+endif