ARM: imx: imx8mp: Enable support for i2c5 and i2c6 on i.MX8MP
The i.MX8MP SoC contains 2 more i2c buses. Add support for the
configuration of these buses.
Signed-off-by: Martyn Welch <martyn.welch@collabora.com>
diff --git a/arch/arm/mach-imx/imx8m/clock_imx8mm.c b/arch/arm/mach-imx/imx8m/clock_imx8mm.c
index 4db55f8..64ad57e 100644
--- a/arch/arm/mach-imx/imx8m/clock_imx8mm.c
+++ b/arch/arm/mach-imx/imx8m/clock_imx8mm.c
@@ -36,11 +36,17 @@
int enable_i2c_clk(unsigned char enable, unsigned i2c_num)
{
- /* 0 - 3 is valid i2c num */
- if (i2c_num > 3)
+ u8 i2c_ccgr[6] = {
+ CCGR_I2C1, CCGR_I2C2, CCGR_I2C3, CCGR_I2C4,
+#if (IS_ENABLED(CONFIG_IMX8MP))
+ CCGR_I2C5_8MP, CCGR_I2C6_8MP
+#endif
+ };
+
+ if (i2c_num > ARRAY_SIZE(i2c_ccgr))
return -EINVAL;
- clock_enable(CCGR_I2C1 + i2c_num, !!enable);
+ clock_enable(i2c_ccgr[i2c_num], !!enable);
return 0;
}