diff --git a/arch/microblaze/cpu/interrupts.c b/arch/microblaze/cpu/interrupts.c
index e5d8894..010ca4a 100644
--- a/arch/microblaze/cpu/interrupts.c
+++ b/arch/microblaze/cpu/interrupts.c
@@ -115,8 +115,6 @@
 int interrupt_init(void)
 {
 	int i;
-
-#ifdef CONFIG_OF_CONTROL
 	const void *blob = gd->fdt_blob;
 	int node = 0;
 
@@ -136,12 +134,7 @@
 	} else {
 		return node;
 	}
-#else
-#if defined(CONFIG_SYS_INTC_0_ADDR) && defined(CONFIG_SYS_INTC_0_NUM)
-	intc = (microblaze_intc_t *)CONFIG_SYS_INTC_0_ADDR;
-	irq_no = CONFIG_SYS_INTC_0_NUM;
-#endif
-#endif
+
 	if (irq_no) {
 		vecs = calloc(1, sizeof(struct irq_action) * irq_no);
 		if (vecs == NULL) {
diff --git a/arch/microblaze/cpu/timer.c b/arch/microblaze/cpu/timer.c
index c0fc7c0..8845e07 100644
--- a/arch/microblaze/cpu/timer.c
+++ b/arch/microblaze/cpu/timer.c
@@ -31,11 +31,6 @@
 		i = get_timer(0);
 		while ((get_timer(0) - i) < (usec / 1000))
 			;
-	} else {
-#ifndef CONFIG_OF_CONTROL
-		for (i = 0; i < (usec * XILINX_CLOCK_FREQ / 10000000); i++)
-			;
-#endif
 	}
 }
 
@@ -51,8 +46,6 @@
 	int irq = -1;
 	u32 preload = 0;
 	u32 ret = 0;
-
-#ifdef CONFIG_OF_CONTROL
 	const void *blob = gd->fdt_blob;
 	int node = 0;
 	u32 cell[2];
@@ -83,13 +76,6 @@
 		return node;
 	}
 
-#else
-#if defined(CONFIG_SYS_TIMER_0_ADDR) && defined(CONFIG_SYS_INTC_0_NUM)
-	preload = XILINX_CLOCK_FREQ / CONFIG_SYS_HZ;
-	irq = CONFIG_SYS_TIMER_0_IRQ;
-	tmr = (microblaze_timer_t *) (CONFIG_SYS_TIMER_0_ADDR);
-#endif
-#endif
 	if (tmr && preload && irq >= 0) {
 		tmr->loadreg = preload;
 		tmr->control = TIMER_INTERRUPT | TIMER_RESET;
diff --git a/board/xilinx/microblaze-generic/xparameters.h b/board/xilinx/microblaze-generic/xparameters.h
index ccb528e..dc5645b 100644
--- a/board/xilinx/microblaze-generic/xparameters.h
+++ b/board/xilinx/microblaze-generic/xparameters.h
@@ -13,21 +13,10 @@
 
 #define XILINX_BOARD_NAME	microblaze-generic
 
-/* System Clock Frequency */
-#define XILINX_CLOCK_FREQ	100000000
-
 /* Microblaze is microblaze_0 */
 #define XILINX_USE_MSR_INSTR	1
 #define XILINX_FSL_NUMBER	3
 
-/* Interrupt controller is opb_intc_0 */
-#define XILINX_INTC_BASEADDR	0x41200000
-#define XILINX_INTC_NUM_INTR_INPUTS	6
-
-/* Timer pheriphery is opb_timer_1 */
-#define XILINX_TIMER_BASEADDR	0x41c00000
-#define XILINX_TIMER_IRQ	0
-
 /* GPIO is LEDs_4Bit*/
 #define XILINX_GPIO_BASEADDR	0x40000000
 
diff --git a/include/configs/microblaze-generic.h b/include/configs/microblaze-generic.h
index 27668f2..09bfabc 100644
--- a/include/configs/microblaze-generic.h
+++ b/include/configs/microblaze-generic.h
@@ -47,18 +47,6 @@
 #endif
 #define CONFIG_BOARD_LATE_INIT
 
-/* interrupt controller */
-#ifdef XILINX_INTC_BASEADDR
-# define CONFIG_SYS_INTC_0_ADDR		XILINX_INTC_BASEADDR
-# define CONFIG_SYS_INTC_0_NUM		XILINX_INTC_NUM_INTR_INPUTS
-#endif
-
-/* timer */
-#if defined(XILINX_TIMER_BASEADDR) && defined(XILINX_TIMER_IRQ)
-#  define CONFIG_SYS_TIMER_0_ADDR	XILINX_TIMER_BASEADDR
-#  define CONFIG_SYS_TIMER_0_IRQ	XILINX_TIMER_IRQ
-#endif
-
 /* watchdog */
 #if defined(XILINX_WATCHDOG_BASEADDR) && defined(XILINX_WATCHDOG_IRQ)
 # define CONFIG_WATCHDOG_BASEADDR	XILINX_WATCHDOG_BASEADDR