riscv: lib: implement enable_caches for sifive cache
The enable_caches is a generic hook for architecture-implemented, we
define this function to enable composable cache of sifive platforms.
In sifive_cache, it invokes the generic cache_enable interface of cache
uclass to execute the relative implementation in SiFive ccache driver.
Signed-off-by: Zong Li <zong.li@sifive.com>
Reviewed-by: Rick Chen <rick@andestech.com>
diff --git a/arch/riscv/lib/sifive_cache.c b/arch/riscv/lib/sifive_cache.c
new file mode 100644
index 0000000..2815487
--- /dev/null
+++ b/arch/riscv/lib/sifive_cache.c
@@ -0,0 +1,27 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2021 SiFive, Inc
+ */
+
+#include <common.h>
+#include <cache.h>
+#include <cpu_func.h>
+#include <dm.h>
+
+void enable_caches(void)
+{
+ struct udevice *dev;
+ int ret;
+
+ /* Enable ways of ccache */
+ ret = uclass_get_device_by_driver(UCLASS_CACHE,
+ DM_DRIVER_GET(sifive_ccache),
+ &dev);
+ if (ret) {
+ log_debug("Cannot enable cache ways");
+ } else {
+ ret = cache_enable(dev);
+ if (ret)
+ log_debug("ccache enable failed");
+ }
+}