arch/m68k/dts/mcf5253.dtsi

// SPDX-License-Identifier: GPL-2.0+
/*
 * Copyright (C) 2018 Angelo Dureghello <angelo@sysam.it>
 */

/ {
	compatible = "fsl,mcf5253";

	aliases {
		serial0 = &uart0;
	};

	soc {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;

		mbar: mbar@10000000 {
			compatible = "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges = <0x00000000 0x10000000 0x10000>;
			reg = <0x10000000 0x10000>;

			uart0: uart@1c0 {
				compatible = "fsl,mcf-uart";
				reg = <0x1c0 0x40>;
				status = "disabled";
			};

			uart1: uart@200 {
				compatible = "fsl,mcf-uart";
				reg = <0x200 0x40>;
				status = "disabled";
			};

			uart3: uart@c00 {
				compatible = "fsl,mcf-uart";
				reg = <0xc00 0x40>;
				status = "disabled";
			};

			i2c0: i2c@280 {
				compatible = "fsl-i2c";
				#address-cells=<1>;
				#size-cells=<0>;
				cell-index = <0>;
				reg = <0x280 0x14>;
				clock-frequency = <100000>;
				status = "disabled";
			};
		};

		mbar2: mbar2@80000000 {
			compatible = "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges = <0x00000000 0x80000000 0x10000>;
			reg = <0x80000000 0x10000>;

			i2c1: i2c@440 {
				compatible = "fsl-i2c";
				#address-cells=<1>;
				#size-cells=<0>;
				cell-index = <0>;
				reg = <0x440 0x14>;
				clock-frequency = <100000>;
				status = "disabled";
			};
		};
	};
};