diff --git a/arch/riscv/lib/semihosting.S b/arch/riscv/lib/semihosting.S
new file mode 100644
index 0000000..c0c571b
--- /dev/null
+++ b/arch/riscv/lib/semihosting.S
@@ -0,0 +1,22 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2022 Ventana Micro Systems Inc.
+ */
+
+#include <asm/asm.h>
+#include <linux/linkage.h>
+
+.pushsection .text.smh_trap, "ax"
+ENTRY(smh_trap)
+	.align	2
+	.option	push
+	.option	norvc		/* semihosting sequence must be 32-bit wide */
+
+	slli zero, zero, 0x1f	/* Entry NOP to identify semihosting */
+	ebreak
+	srai zero, zero, 7	/* NOP encoding of semihosting call number */
+	.option pop
+
+	ret
+ENDPROC(smh_trap)
+.popsection
diff --git a/arch/riscv/lib/semihosting.c b/arch/riscv/lib/semihosting.c
deleted file mode 100644
index d6593b0..0000000
--- a/arch/riscv/lib/semihosting.c
+++ /dev/null
@@ -1,24 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (C) 2022 Ventana Micro Systems Inc.
- */
-
-#include <common.h>
-
-long smh_trap(int sysnum, void *addr)
-{
-	register int ret asm ("a0") = sysnum;
-	register void *param0 asm ("a1") = addr;
-
-	asm volatile (".align 4\n"
-		".option push\n"
-		".option norvc\n"
-
-		"slli zero, zero, 0x1f\n"
-		"ebreak\n"
-		"srai zero, zero, 7\n"
-		".option pop\n"
-		: "+r" (ret) : "r" (param0) : "memory");
-
-	return ret;
-}