x86: ivybridge: Do not require HAVE_INTEL_ME
Do not set HAVE_INTEL_ME by default as for some cases Intel ME
firmware even does not reside on the same SPI flash as U-Boot.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
diff --git a/arch/x86/cpu/ivybridge/Kconfig b/arch/x86/cpu/ivybridge/Kconfig
index 56abd8f..1768a26 100644
--- a/arch/x86/cpu/ivybridge/Kconfig
+++ b/arch/x86/cpu/ivybridge/Kconfig
@@ -48,7 +48,6 @@
config CPU_SPECIFIC_OPTIONS
def_bool y
select SMM_TSEG
- select HAVE_INTEL_ME
select X86_RAMTEST
config SMM_TSEG_SIZE
diff --git a/board/google/chromebook_link/Kconfig b/board/google/chromebook_link/Kconfig
index 6b13939..fa12f33 100644
--- a/board/google/chromebook_link/Kconfig
+++ b/board/google/chromebook_link/Kconfig
@@ -19,6 +19,7 @@
def_bool y
select X86_RESET_VECTOR
select NORTHBRIDGE_INTEL_IVYBRIDGE
+ select HAVE_INTEL_ME
select BOARD_ROMSIZE_KB_8192
config PCIE_ECAM_BASE
diff --git a/board/google/chromebox_panther/Kconfig b/board/google/chromebox_panther/Kconfig
index ae96d23..2af3aa9 100644
--- a/board/google/chromebox_panther/Kconfig
+++ b/board/google/chromebox_panther/Kconfig
@@ -20,6 +20,7 @@
def_bool y
select X86_RESET_VECTOR
select NORTHBRIDGE_INTEL_IVYBRIDGE
+ select HAVE_INTEL_ME
select BOARD_ROMSIZE_KB_8192
config SYS_CAR_ADDR