arm: mach: marvell: Remove duplicate newlines
Drop all duplicate newlines. No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
diff --git a/arch/arm/mach-kirkwood/mpp.c b/arch/arm/mach-kirkwood/mpp.c
index 7938820..3d224e2 100644
--- a/arch/arm/mach-kirkwood/mpp.c
+++ b/arch/arm/mach-kirkwood/mpp.c
@@ -48,7 +48,6 @@
}
debug("\n");
-
while (*mpp_list) {
unsigned int num = MPP_NUM(*mpp_list);
unsigned int sel = MPP_SEL(*mpp_list);
diff --git a/arch/arm/mach-mvebu/mbus.c b/arch/arm/mach-mvebu/mbus.c
index 9baeece..c13416a 100644
--- a/arch/arm/mach-mvebu/mbus.c
+++ b/arch/arm/mach-mvebu/mbus.c
@@ -276,7 +276,6 @@
target, attr);
}
-
for (win = 0; win < MVEBU_MBUS_NUM_WINS; win++)
if (mvebu_mbus_window_is_free(win))
return mvebu_mbus_setup_window(win, base, size,
diff --git a/arch/arm/mach-mvebu/serdes/axp/board_env_spec.h b/arch/arm/mach-mvebu/serdes/axp/board_env_spec.h
index 9c3e7c0..625c2a5 100644
--- a/arch/arm/mach-mvebu/serdes/axp/board_env_spec.h
+++ b/arch/arm/mach-mvebu/serdes/axp/board_env_spec.h
@@ -76,7 +76,6 @@
#define SAR_CPU_FAB_GET(cpu, fab) (((cpu & 0x7) << 21) | ((fab & 0xF) << 24))
-
#define CORE_AVS_CONTROL_0REG 0x18300
#define CORE_AVS_CONTROL_2REG 0x18308
#define CPU_AVS_CONTROL2_REG 0x20868
@@ -86,7 +85,6 @@
#define MSAR_TCLK_OFFS 28
#define MSAR_TCLK_MASK (0x1 << MSAR_TCLK_OFFS)
-
/* Controler environment registers offsets */
#define GEN_PURP_RES_1_REG 0x182F4
#define GEN_PURP_RES_2_REG 0x182F8
@@ -146,7 +144,6 @@
0x40000 + ((port) % 2) * 0x4000)
#define MV_ETH_REGS_BASE(port) MV_ETH_REGS_OFFSET(port)
-
#define SGMII_PWR_PLL_CTRL_REG(port) (MV_ETH_REGS_BASE(port) + 0xE04)
#define SGMII_DIG_LP_ENA_REG(port) (MV_ETH_REGS_BASE(port) + 0xE8C)
#define SGMII_REF_CLK_SEL_REG(port) (MV_ETH_REGS_BASE(port) + 0xF18)
@@ -182,7 +179,6 @@
#define SCR_PEX1_4BY1_OFFS 8
#define SCR_PEX1_4BY1_MASK (1 << SCR_PEX1_4BY1_OFFS)
-
#define MV_MISC_REGS_OFFSET (0x18200)
#define MV_MISC_REGS_BASE (MV_MISC_REGS_OFFSET)
#define SOC_CTRL_REG (MV_MISC_REGS_BASE + 0x4)
@@ -226,7 +222,6 @@
#define PXCAR_REAL_EXT_REG_NUM_OFFS 8
#define PXCAR_REAL_EXT_REG_NUM_MASK (0xF << PXCAR_REAL_EXT_REG_NUM_OFFS)
-
#define PEX_CAPABILITIES_REG(if) ((MV_PEX_IF_REGS_BASE(if)) + 0x60)
#define PEX_LINK_CAPABILITIES_REG(if) ((MV_PEX_IF_REGS_BASE(if)) + 0x6C)
#define PEX_LINK_CTRL_STATUS_REG(if) ((MV_PEX_IF_REGS_BASE(if)) + 0x70)
diff --git a/arch/arm/mach-mvebu/serdes/axp/high_speed_env_spec.h b/arch/arm/mach-mvebu/serdes/axp/high_speed_env_spec.h
index b920f5e..a29d06c 100644
--- a/arch/arm/mach-mvebu/serdes/axp/high_speed_env_spec.h
+++ b/arch/arm/mach-mvebu/serdes/axp/high_speed_env_spec.h
@@ -21,7 +21,6 @@
SERDES_LAST_UNIT
} MV_BIN_SERDES_UNIT_INDX;
-
typedef enum {
PEX_BUS_DISABLED = 0,
PEX_BUS_MODE_X1 = 1,
@@ -63,7 +62,6 @@
MV_SERDES_CHANGE_M_PHY *serdes_m_phy_change;
} MV_BIN_SERDES_CFG;
-
#define BIN_SERDES_CFG { \
{0, 1, -1 , -1, -1, -1, -1, -1, -1}, /* Lane 0 */ \
{0, 1, -1 , -1, -1, -1, -1, -1, 2}, /* Lane 1 */ \