* Patch by Andreas Oberritter, 09 Nov 2002:
Change behaviour of NetLoop(): return -1 for errors, filesize
otherwise; return code 0 is valid an means no file loaded - in this
case the environment still gets updated!
* Patches by Jon Diekema, 9 Nov 2002:
- improve ADC/DAC clocking on the SACSng board to align
the failing edges of LRCLK and SCLK
- sbc8260 configuration tweaks
- add status LED support for 82xx systems
- wire sspi/sspo commands into command handler; improved error
handlering
- add timestamp support and alternate memory test to the
SACSng configuration
diff --git a/CHANGELOG b/CHANGELOG
index 4427c35..75a5e42 100644
--- a/CHANGELOG
+++ b/CHANGELOG
@@ -2,7 +2,22 @@
Changes since for U-Boot 0.1.0:
======================================================================
-* Vince Husovsky, 7 Nov 2002:
+* Patch by Andreas Oberritter, 09 Nov 2002:
+ Change behaviour of NetLoop(): return -1 for errors, filesize
+ otherwise; return code 0 is valid an means no file loaded - in this
+ case the environment still gets updated!
+
+* Patches by Jon Diekema, 9 Nov 2002:
+ - improve ADC/DAC clocking on the SACSng board to align
+ the failing edges of LRCLK and SCLK
+ - sbc8260 configuration tweaks
+ - add status LED support for 82xx systems
+ - wire sspi/sspo commands into command handler; improved error
+ handlering
+ - add timestamp support and alternate memory test to the
+ SACSng configuration
+
+* Patch by Vince Husovsky, 7 Nov 2002:
Add "-n" to linker options to get rid of "Not enough room for
program headers" problem
diff --git a/board/hymod/bsp.c b/board/hymod/bsp.c
index a33c97c..2ceaeb5 100644
--- a/board/hymod/bsp.c
+++ b/board/hymod/bsp.c
@@ -197,7 +197,7 @@
copy_filename (BootFile, argv[2], sizeof (BootFile));
load_addr = simple_strtoul (argv[3], NULL, 16);
- if (NetLoop (TFTP) == 0) {
+ if (NetLoop (TFTP) <= 0) {
printf ("tftp transfer failed - aborting fgpa load\n");
return 1;
}
diff --git a/board/hymod/fetch.c b/board/hymod/fetch.c
index 1511b08..dcbda31 100644
--- a/board/hymod/fetch.c
+++ b/board/hymod/fetch.c
@@ -89,7 +89,7 @@
copy_filename(BootFile, fn, sizeof (BootFile));
load_addr = addr;
- if (NetLoop(TFTP) == 0) {
+ if (NetLoop(TFTP) <= 0) {
printf("tftp transfer of file '%s' failed\n", fn);
return (0);
}
diff --git a/board/sacsng/clkinit.c b/board/sacsng/clkinit.c
index 1e851e1..634c1e0 100644
--- a/board/sacsng/clkinit.c
+++ b/board/sacsng/clkinit.c
@@ -286,7 +286,6 @@
}
uint Daq_Get_SampleRate(void)
-
{
/*
* Read the BRG's to return the actual sample rate.
@@ -294,68 +293,12 @@
return (Daq_BRG_Rate(MCLK_BRG) / (MCLK_DIVISOR * SCLK_DIVISOR));
}
-uint Daq_Set_SampleRate(uint rate, uint force)
-
-{
- DECLARE_GLOBAL_DATA_PTR;
- uint mclk_divisor; /* MCLK divisor */
- uint rate_curr; /* Current sample rate */
-
- /*
- * Limit the sample rate to some sensible values.
- */
- if (Daq64xSampling) {
- if (rate > MAX_64x_SAMPLE_RATE) {
- rate = MAX_64x_SAMPLE_RATE;
- }
- }
- else {
- if (rate > MAX_128x_SAMPLE_RATE) {
- rate = MAX_128x_SAMPLE_RATE;
- }
- }
- if (rate < MIN_SAMPLE_RATE) {
- rate = MIN_SAMPLE_RATE;
- }
-
- /* Check to see if we are really changing rates */
- rate_curr = Daq_Get_SampleRate();
- if ((rate != rate_curr) || force) {
- /*
- * Dynamically adjust MCLK based on the new sample rate.
- */
-
- /* Compute the divisors */
- mclk_divisor = BRG_INT_CLK / (rate * MCLK_DIVISOR * SCLK_DIVISOR);
-
- /* Setup MCLK */
- Daq_BRG_Set_Count(MCLK_BRG, mclk_divisor);
-
- /* Setup SCLK */
-# ifdef RUN_SCLK_ON_BRG_INT
- Daq_BRG_Set_Count(SCLK_BRG, mclk_divisor * MCLK_DIVISOR);
-# else
- Daq_BRG_Set_Count(SCLK_BRG, MCLK_DIVISOR);
-# endif
-
-# ifdef RUN_LRCLK_ON_BRG_INT
- Daq_BRG_Set_Count(LRCLK_BRG,
- mclk_divisor * MCLK_DIVISOR * SCLK_DIVISOR);
-# else
- Daq_BRG_Set_Count(LRCLK_BRG, SCLK_DIVISOR);
-# endif
-
- /* Read the BRG's to return the actual sample rate. */
- rate_curr = Daq_Get_SampleRate();
- }
-
- return (rate_curr);
-}
-
void Daq_Init_Clocks(int sample_rate, int sample_64x)
-
{
+ DECLARE_GLOBAL_DATA_PTR;
volatile ioport_t *iopa = ioport_addr((immap_t *)CFG_IMMR, 0 /* port A */);
+ uint mclk_divisor; /* MCLK divisor */
+ int flag; /* Interrupt state */
/* Save off the clocking data */
Daq64xSampling = sample_64x;
@@ -363,18 +306,11 @@
/*
* Limit the sample rate to some sensible values.
*/
- if (Daq64xSampling) {
- if (sample_rate > MAX_64x_SAMPLE_RATE) {
- sample_rate = MAX_64x_SAMPLE_RATE;
- }
- }
- else {
- if (sample_rate > MAX_128x_SAMPLE_RATE) {
- sample_rate = MAX_128x_SAMPLE_RATE;
- }
+ if (sample_rate > MAX_64x_SAMPLE_RATE) {
+ sample_rate = MAX_64x_SAMPLE_RATE;
}
if (sample_rate < MIN_SAMPLE_RATE) {
- sample_rate = MIN_SAMPLE_RATE;
+ sample_rate = MIN_SAMPLE_RATE;
}
/*
@@ -398,8 +334,41 @@
Daq_BRG_Set_ExtClk(LRCLK_BRG, CPM_BRG_EXTC_CLK5);
# endif
+ /*
+ * Dynamically adjust MCLK based on the new sample rate.
+ */
+
+ /* Compute the divisors */
+ mclk_divisor = BRG_INT_CLK / (sample_rate * MCLK_DIVISOR * SCLK_DIVISOR);
+
+ /*
+ * Disable interrupt and save the current state
+ */
+ flag = disable_interrupts();
+
+ /* Setup MCLK */
+ Daq_BRG_Set_Count(MCLK_BRG, mclk_divisor);
+
+ /* Setup SCLK */
+# ifdef RUN_SCLK_ON_BRG_INT
+ Daq_BRG_Set_Count(SCLK_BRG, mclk_divisor * MCLK_DIVISOR);
+# else
+ Daq_BRG_Set_Count(SCLK_BRG, MCLK_DIVISOR);
+# endif
+
- /* Setup the BRG rates */
- Daq_Set_SampleRate(sample_rate, TRUE);
+# ifdef RUN_LRCLK_ON_BRG_INT
+ Daq_BRG_Set_Count(LRCLK_BRG,
+ mclk_divisor * MCLK_DIVISOR * SCLK_DIVISOR);
+# else
+ Daq_BRG_Set_Count(LRCLK_BRG, SCLK_DIVISOR);
+# endif
+
+ /*
+ * Restore the Interrupt state
+ */
+ if (flag) {
+ enable_interrupts();
+ }
/* Enable the clock drivers */
iopa->pdat &= ~SLRCLK_EN_MASK;
@@ -410,116 +379,276 @@
{
#ifdef TIGHTEN_UP_BRG_TIMING
volatile immap_t *immr = (immap_t *)CFG_IMMR;
+ register uint mclk_brg; /* MCLK BRG value */
+ register uint sclk_brg; /* SCLK BRG value */
+ register uint lrclk_brg; /* LRCLK BRG value */
+ unsigned long flag; /* Interrupt flags */
#endif
# ifdef TIGHTEN_UP_BRG_TIMING
- /*
- * Reset MCLK BRG
+ /*
+ * Obtain MCLK BRG reset/disabled value
*/
# if (MCLK_BRG == 0)
- immr->im_brgc1 |= CPM_BRG_RST;
- immr->im_brgc1 &= ~CPM_BRG_RST;
+ mclk_brg = (*IM_BRGC1 | CPM_BRG_RST) & ~CPM_BRG_EN;
# endif
# if (MCLK_BRG == 1)
- immr->im_brgc2 |= CPM_BRG_RST;
- immr->im_brgc2 &= ~CPM_BRG_RST;
+ mclk_brg = (*IM_BRGC2 | CPM_BRG_RST) & ~CPM_BRG_EN;
# endif
# if (MCLK_BRG == 2)
- immr->im_brgc3 |= CPM_BRG_RST;
- immr->im_brgc3 &= ~CPM_BRG_RST;
+ mclk_brg = (*IM_BRGC3 | CPM_BRG_RST) & ~CPM_BRG_EN;
# endif
# if (MCLK_BRG == 3)
- immr->im_brgc4 |= CPM_BRG_RST;
- immr->im_brgc4 &= ~CPM_BRG_RST;
+ mclk_brg = (*IM_BRGC4 | CPM_BRG_RST) & ~CPM_BRG_EN;
# endif
# if (MCLK_BRG == 4)
- immr->im_brgc5 |= CPM_BRG_RST;
- immr->im_brgc5 &= ~CPM_BRG_RST;
+ mclk_brg = (*IM_BRGC5 | CPM_BRG_RST) & ~CPM_BRG_EN;
# endif
# if (MCLK_BRG == 5)
- immr->im_brgc6 |= CPM_BRG_RST;
- immr->im_brgc6 &= ~CPM_BRG_RST;
+ mclk_brg = (*IM_BRGC6 | CPM_BRG_RST) & ~CPM_BRG_EN;
# endif
# if (MCLK_BRG == 6)
- immr->im_brgc7 |= CPM_BRG_RST;
- immr->im_brgc7 &= ~CPM_BRG_RST;
+ mclk_brg = (*IM_BRGC7 | CPM_BRG_RST) & ~CPM_BRG_EN;
# endif
# if (MCLK_BRG == 7)
- immr->im_brgc8 |= CPM_BRG_RST;
- immr->im_brgc8 &= ~CPM_BRG_RST;
+ mclk_brg = (*IM_BRGC8 | CPM_BRG_RST) & ~CPM_BRG_EN;
# endif
- /*
- * Reset SCLK BRG
+ /*
+ * Obtain SCLK BRG reset/disabled value
*/
# if (SCLK_BRG == 0)
- immr->im_brgc1 |= CPM_BRG_RST;
- immr->im_brgc1 &= ~CPM_BRG_RST;
+ sclk_brg = (*IM_BRGC1 | CPM_BRG_RST) & ~CPM_BRG_EN;
# endif
# if (SCLK_BRG == 1)
- immr->im_brgc2 |= CPM_BRG_RST;
- immr->im_brgc2 &= ~CPM_BRG_RST;
+ sclk_brg = (*IM_BRGC2 | CPM_BRG_RST) & ~CPM_BRG_EN;
# endif
# if (SCLK_BRG == 2)
- immr->im_brgc3 |= CPM_BRG_RST;
- immr->im_brgc3 &= ~CPM_BRG_RST;
+ sclk_brg = (*IM_BRGC3 | CPM_BRG_RST) & ~CPM_BRG_EN;
# endif
# if (SCLK_BRG == 3)
- immr->im_brgc4 |= CPM_BRG_RST;
- immr->im_brgc4 &= ~CPM_BRG_RST;
+ sclk_brg = (*IM_BRGC4 | CPM_BRG_RST) & ~CPM_BRG_EN;
# endif
# if (SCLK_BRG == 4)
- immr->im_brgc5 |= CPM_BRG_RST;
- immr->im_brgc5 &= ~CPM_BRG_RST;
+ sclk_brg = (*IM_BRGC5 | CPM_BRG_RST) & ~CPM_BRG_EN;
# endif
# if (SCLK_BRG == 5)
- immr->im_brgc6 |= CPM_BRG_RST;
- immr->im_brgc6 &= ~CPM_BRG_RST;
+ sclk_brg = (*IM_BRGC6 | CPM_BRG_RST) & ~CPM_BRG_EN;
# endif
# if (SCLK_BRG == 6)
- immr->im_brgc7 |= CPM_BRG_RST;
- immr->im_brgc7 &= ~CPM_BRG_RST;
+ sclk_brg = (*IM_BRGC7 | CPM_BRG_RST) & ~CPM_BRG_EN;
# endif
# if (SCLK_BRG == 7)
- immr->im_brgc8 |= CPM_BRG_RST;
- immr->im_brgc8 &= ~CPM_BRG_RST;
+ sclk_brg = (*IM_BRGC8 | CPM_BRG_RST) & ~CPM_BRG_EN;
# endif
- /*
- * Reset LRCLK BRG
+ /*
+ * Obtain LRCLK BRG reset/disabled value
*/
# if (LRCLK_BRG == 0)
- immr->im_brgc1 |= CPM_BRG_RST;
- immr->im_brgc1 &= ~CPM_BRG_RST;
+ lrclk_brg = (*IM_BRGC1 | CPM_BRG_RST) & ~CPM_BRG_EN;
# endif
# if (LRCLK_BRG == 1)
- immr->im_brgc2 |= CPM_BRG_RST;
- immr->im_brgc2 &= ~CPM_BRG_RST;
+ lrclk_brg = (*IM_BRGC2 | CPM_BRG_RST) & ~CPM_BRG_EN;
# endif
# if (LRCLK_BRG == 2)
- immr->im_brgc3 |= CPM_BRG_RST;
- immr->im_brgc3 &= ~CPM_BRG_RST;
+ lrclk_brg = (*IM_BRGC3 | CPM_BRG_RST) & ~CPM_BRG_EN;
# endif
# if (LRCLK_BRG == 3)
- immr->im_brgc4 |= CPM_BRG_RST;
- immr->im_brgc4 &= ~CPM_BRG_RST;
+ lrclk_brg = (*IM_BRGC4 | CPM_BRG_RST) & ~CPM_BRG_EN;
# endif
# if (LRCLK_BRG == 4)
- immr->im_brgc5 |= CPM_BRG_RST;
- immr->im_brgc5 &= ~CPM_BRG_RST;
+ lrclk_brg = (*IM_BRGC5 | CPM_BRG_RST) & ~CPM_BRG_EN;
# endif
# if (LRCLK_BRG == 5)
- immr->im_brgc6 |= CPM_BRG_RST;
- immr->im_brgc6 &= ~CPM_BRG_RST;
+ lrclk_brg = (*IM_BRGC6 | CPM_BRG_RST) & ~CPM_BRG_EN;
# endif
# if (LRCLK_BRG == 6)
- immr->im_brgc7 |= CPM_BRG_RST;
- immr->im_brgc7 &= ~CPM_BRG_RST;
+ lrclk_brg = (*IM_BRGC7 | CPM_BRG_RST) & ~CPM_BRG_EN;
# endif
# if (LRCLK_BRG == 7)
- immr->im_brgc8 |= CPM_BRG_RST;
- immr->im_brgc8 &= ~CPM_BRG_RST;
+ lrclk_brg = (*IM_BRGC8 | CPM_BRG_RST) & ~CPM_BRG_EN;
+# endif
+
+ /*
+ * Disable interrupt and save the current state
+ */
+ flag = disable_interrupts();
+
+ /*
+ * Set reset on MCLK BRG
+ */
+# if (MCLK_BRG == 0)
+ *IM_BRGC1 = mclk_brg;
+# endif
+# if (MCLK_BRG == 1)
+ *IM_BRGC2 = mclk_brg;
+# endif
+# if (MCLK_BRG == 2)
+ *IM_BRGC3 = mclk_brg;
+# endif
+# if (MCLK_BRG == 3)
+ *IM_BRGC4 = mclk_brg;
+# endif
+# if (MCLK_BRG == 4)
+ *IM_BRGC5 = mclk_brg;
# endif
+# if (MCLK_BRG == 5)
+ *IM_BRGC6 = mclk_brg;
+# endif
+# if (MCLK_BRG == 6)
+ *IM_BRGC7 = mclk_brg;
+# endif
+# if (MCLK_BRG == 7)
+ *IM_BRGC8 = mclk_brg;
+# endif
+
+ /*
+ * Set reset on SCLK BRG
+ */
+# if (SCLK_BRG == 0)
+ *IM_BRGC1 = sclk_brg;
+# endif
+# if (SCLK_BRG == 1)
+ *IM_BRGC2 = sclk_brg;
+# endif
+# if (SCLK_BRG == 2)
+ *IM_BRGC3 = sclk_brg;
+# endif
+# if (SCLK_BRG == 3)
+ *IM_BRGC4 = sclk_brg;
+# endif
+# if (SCLK_BRG == 4)
+ *IM_BRGC5 = sclk_brg;
+# endif
+# if (SCLK_BRG == 5)
+ *IM_BRGC6 = sclk_brg;
+# endif
+# if (SCLK_BRG == 6)
+ *IM_BRGC7 = sclk_brg;
+# endif
+# if (SCLK_BRG == 7)
+ *IM_BRGC8 = sclk_brg;
+# endif
+
+ /*
+ * Set reset on LRCLK BRG
+ */
+# if (LRCLK_BRG == 0)
+ *IM_BRGC1 = lrclk_brg;
+# endif
+# if (LRCLK_BRG == 1)
+ *IM_BRGC2 = lrclk_brg;
+# endif
+# if (LRCLK_BRG == 2)
+ *IM_BRGC3 = lrclk_brg;
+# endif
+# if (LRCLK_BRG == 3)
+ *IM_BRGC4 = lrclk_brg;
+# endif
+# if (LRCLK_BRG == 4)
+ *IM_BRGC5 = lrclk_brg;
+# endif
+# if (LRCLK_BRG == 5)
+ *IM_BRGC6 = lrclk_brg;
+# endif
+# if (LRCLK_BRG == 6)
+ *IM_BRGC7 = lrclk_brg;
+# endif
+# if (LRCLK_BRG == 7)
+ *IM_BRGC8 = lrclk_brg;
+# endif
+
+ /*
+ * Clear reset on MCLK BRG
+ */
+# if (MCLK_BRG == 0)
+ *IM_BRGC1 = mclk_brg & ~CPM_BRG_RST;
+# endif
+# if (MCLK_BRG == 1)
+ *IM_BRGC2 = mclk_brg & ~CPM_BRG_RST;
+# endif
+# if (MCLK_BRG == 2)
+ *IM_BRGC3 = mclk_brg & ~CPM_BRG_RST;
+# endif
+# if (MCLK_BRG == 3)
+ *IM_BRGC4 = mclk_brg & ~CPM_BRG_RST;
+# endif
+# if (MCLK_BRG == 4)
+ *IM_BRGC5 = mclk_brg & ~CPM_BRG_RST;
+# endif
+# if (MCLK_BRG == 5)
+ *IM_BRGC6 = mclk_brg & ~CPM_BRG_RST;
+# endif
+# if (MCLK_BRG == 6)
+ *IM_BRGC7 = mclk_brg & ~CPM_BRG_RST;
+# endif
+# if (MCLK_BRG == 7)
+ *IM_BRGC8 = mclk_brg & ~CPM_BRG_RST;
+# endif
+
+ /*
+ * Clear reset on SCLK BRG
+ */
+# if (SCLK_BRG == 0)
+ *IM_BRGC1 = sclk_brg & ~CPM_BRG_RST;
+# endif
+# if (SCLK_BRG == 1)
+ *IM_BRGC2 = sclk_brg & ~CPM_BRG_RST;
+# endif
+# if (SCLK_BRG == 2)
+ *IM_BRGC3 = sclk_brg & ~CPM_BRG_RST;
+# endif
+# if (SCLK_BRG == 3)
+ *IM_BRGC4 = sclk_brg & ~CPM_BRG_RST;
+# endif
+# if (SCLK_BRG == 4)
+ *IM_BRGC5 = sclk_brg & ~CPM_BRG_RST;
+# endif
+# if (SCLK_BRG == 5)
+ *IM_BRGC6 = sclk_brg & ~CPM_BRG_RST;
+# endif
+# if (SCLK_BRG == 6)
+ *IM_BRGC7 = sclk_brg & ~CPM_BRG_RST;
+# endif
+# if (SCLK_BRG == 7)
+ *IM_BRGC8 = sclk_brg & ~CPM_BRG_RST;
+# endif
+
+ /*
+ * Clear reset on LRCLK BRG
+ */
+# if (LRCLK_BRG == 0)
+ *IM_BRGC1 = lrclk_brg & ~CPM_BRG_RST;
+# endif
+# if (LRCLK_BRG == 1)
+ *IM_BRGC2 = lrclk_brg & ~CPM_BRG_RST;
+# endif
+# if (LRCLK_BRG == 2)
+ *IM_BRGC3 = lrclk_brg & ~CPM_BRG_RST;
+# endif
+# if (LRCLK_BRG == 3)
+ *IM_BRGC4 = lrclk_brg & ~CPM_BRG_RST;
+# endif
+# if (LRCLK_BRG == 4)
+ *IM_BRGC5 = lrclk_brg & ~CPM_BRG_RST;
+# endif
+# if (LRCLK_BRG == 5)
+ *IM_BRGC6 = lrclk_brg & ~CPM_BRG_RST;
+# endif
+# if (LRCLK_BRG == 6)
+ *IM_BRGC7 = lrclk_brg & ~CPM_BRG_RST;
+# endif
+# if (LRCLK_BRG == 7)
+ *IM_BRGC8 = lrclk_brg & ~CPM_BRG_RST;
+# endif
+
+ /*
+ * Restore the Interrupt state
+ */
+ if (flag) {
+ enable_interrupts();
+ }
# else
/*
* Reset the clocks
@@ -536,99 +665,99 @@
#ifdef TIGHTEN_UP_BRG_TIMING
volatile immap_t *immr = (immap_t *)CFG_IMMR;
- uint mclk_brg; /* MCLK BRG value */
- uint sclk_brg; /* SCLK BRG value */
+ register uint mclk_brg; /* MCLK BRG value */
+ register uint sclk_brg; /* SCLK BRG value */
+ register uint temp_lrclk_brg; /* Temporary LRCLK BRG value */
+ register uint real_lrclk_brg; /* Permanent LRCLK BRG value */
uint lrclk_brg; /* LRCLK BRG value */
- uint temp_lrclk_brg; /* Temporary LRCLK BRG value */
- uint real_lrclk_brg; /* Permanent LRCLK BRG value */
unsigned long flags; /* Interrupt flags */
uint sclk_cnt; /* SCLK count */
uint delay_cnt; /* Delay count */
#endif
# ifdef TIGHTEN_UP_BRG_TIMING
- /*
+ /*
* Obtain the enabled MCLK BRG value
*/
# if (MCLK_BRG == 0)
- mclk_brg = (immr->im_brgc1 & ~CPM_BRG_RST) | CPM_BRG_EN;
+ mclk_brg = (*IM_BRGC1 & ~CPM_BRG_RST) | CPM_BRG_EN;
# endif
# if (MCLK_BRG == 1)
- mclk_brg = (immr->im_brgc2 & ~CPM_BRG_RST) | CPM_BRG_EN;
+ mclk_brg = (*IM_BRGC2 & ~CPM_BRG_RST) | CPM_BRG_EN;
# endif
# if (MCLK_BRG == 2)
- mclk_brg = (immr->im_brgc3 & ~CPM_BRG_RST) | CPM_BRG_EN;
+ mclk_brg = (*IM_BRGC3 & ~CPM_BRG_RST) | CPM_BRG_EN;
# endif
# if (MCLK_BRG == 3)
- mclk_brg = (immr->im_brgc4 & ~CPM_BRG_RST) | CPM_BRG_EN;
+ mclk_brg = (*IM_BRGC4 & ~CPM_BRG_RST) | CPM_BRG_EN;
# endif
# if (MCLK_BRG == 4)
- mclk_brg = (immr->im_brgc5 & ~CPM_BRG_RST) | CPM_BRG_EN;
+ mclk_brg = (*IM_BRGC5 & ~CPM_BRG_RST) | CPM_BRG_EN;
# endif
# if (MCLK_BRG == 5)
- mclk_brg = (immr->im_brgc6 & ~CPM_BRG_RST) | CPM_BRG_EN;
+ mclk_brg = (*IM_BRGC6 & ~CPM_BRG_RST) | CPM_BRG_EN;
# endif
# if (MCLK_BRG == 6)
- mclk_brg = (immr->im_brgc7 & ~CPM_BRG_RST) | CPM_BRG_EN;
+ mclk_brg = (*IM_BRGC7 & ~CPM_BRG_RST) | CPM_BRG_EN;
# endif
# if (MCLK_BRG == 7)
- mclk_brg = (immr->im_brgc8 & ~CPM_BRG_RST) | CPM_BRG_EN;
+ mclk_brg = (*IM_BRGC8 & ~CPM_BRG_RST) | CPM_BRG_EN;
# endif
- /*
+ /*
* Obtain the enabled SCLK BRG value
*/
# if (SCLK_BRG == 0)
- sclk_brg = (immr->im_brgc1 & ~CPM_BRG_RST) | CPM_BRG_EN;
+ sclk_brg = (*IM_BRGC1 & ~CPM_BRG_RST) | CPM_BRG_EN;
# endif
# if (SCLK_BRG == 1)
- sclk_brg = (immr->im_brgc2 & ~CPM_BRG_RST) | CPM_BRG_EN;
+ sclk_brg = (*IM_BRGC2 & ~CPM_BRG_RST) | CPM_BRG_EN;
# endif
# if (SCLK_BRG == 2)
- sclk_brg = (immr->im_brgc3 & ~CPM_BRG_RST) | CPM_BRG_EN;
+ sclk_brg = (*IM_BRGC3 & ~CPM_BRG_RST) | CPM_BRG_EN;
# endif
# if (SCLK_BRG == 3)
- sclk_brg = (immr->im_brgc4 & ~CPM_BRG_RST) | CPM_BRG_EN;
+ sclk_brg = (*IM_BRGC4 & ~CPM_BRG_RST) | CPM_BRG_EN;
# endif
# if (SCLK_BRG == 4)
- sclk_brg = (immr->im_brgc5 & ~CPM_BRG_RST) | CPM_BRG_EN;
+ sclk_brg = (*IM_BRGC5 & ~CPM_BRG_RST) | CPM_BRG_EN;
# endif
# if (SCLK_BRG == 5)
- sclk_brg = (immr->im_brgc6 & ~CPM_BRG_RST) | CPM_BRG_EN;
+ sclk_brg = (*IM_BRGC6 & ~CPM_BRG_RST) | CPM_BRG_EN;
# endif
# if (SCLK_BRG == 6)
- sclk_brg = (immr->im_brgc7 & ~CPM_BRG_RST) | CPM_BRG_EN;
+ sclk_brg = (*IM_BRGC7 & ~CPM_BRG_RST) | CPM_BRG_EN;
# endif
# if (SCLK_BRG == 7)
- sclk_brg = (immr->im_brgc8 & ~CPM_BRG_RST) | CPM_BRG_EN;
+ sclk_brg = (*IM_BRGC8 & ~CPM_BRG_RST) | CPM_BRG_EN;
# endif
- /*
+ /*
* Obtain the enabled LRCLK BRG value
*/
# if (LRCLK_BRG == 0)
- lrclk_brg = (immr->im_brgc1 & ~CPM_BRG_RST) | CPM_BRG_EN;
+ lrclk_brg = (*IM_BRGC1 & ~CPM_BRG_RST) | CPM_BRG_EN;
# endif
# if (LRCLK_BRG == 1)
- lrclk_brg = (immr->im_brgc2 & ~CPM_BRG_RST) | CPM_BRG_EN;
+ lrclk_brg = (*IM_BRGC2 & ~CPM_BRG_RST) | CPM_BRG_EN;
# endif
# if (LRCLK_BRG == 2)
- lrclk_brg = (immr->im_brgc3 & ~CPM_BRG_RST) | CPM_BRG_EN;
+ lrclk_brg = (*IM_BRGC3 & ~CPM_BRG_RST) | CPM_BRG_EN;
# endif
# if (LRCLK_BRG == 3)
- lrclk_brg = (immr->im_brgc4 & ~CPM_BRG_RST) | CPM_BRG_EN;
+ lrclk_brg = (*IM_BRGC4 & ~CPM_BRG_RST) | CPM_BRG_EN;
# endif
# if (LRCLK_BRG == 4)
- lrclk_brg = (immr->im_brgc5 & ~CPM_BRG_RST) | CPM_BRG_EN;
+ lrclk_brg = (*IM_BRGC5 & ~CPM_BRG_RST) | CPM_BRG_EN;
# endif
# if (LRCLK_BRG == 5)
- lrclk_brg = (immr->im_brgc6 & ~CPM_BRG_RST) | CPM_BRG_EN;
+ lrclk_brg = (*IM_BRGC6 & ~CPM_BRG_RST) | CPM_BRG_EN;
# endif
# if (LRCLK_BRG == 6)
- lrclk_brg = (immr->im_brgc7 & ~CPM_BRG_RST) | CPM_BRG_EN;
+ lrclk_brg = (*IM_BRGC7 & ~CPM_BRG_RST) | CPM_BRG_EN;
# endif
# if (LRCLK_BRG == 7)
- lrclk_brg = (immr->im_brgc8 & ~CPM_BRG_RST) | CPM_BRG_EN;
+ lrclk_brg = (*IM_BRGC8 & ~CPM_BRG_RST) | CPM_BRG_EN;
# endif
/* Save off the real LRCLK value */
@@ -639,7 +768,7 @@
/* Compute the delay as a function of SCLK count */
delay_cnt = ((sclk_cnt / 4) - 2) * 10 + 6;
- if (sample_rate == 43402) {
+ if (DaqSampleRate == 43402) {
delay_cnt++;
}
@@ -649,117 +778,129 @@
/* Insert the count */
temp_lrclk_brg |= ((delay_cnt + (sclk_cnt / 2) - 1) << 1) & 0x00001FFE;
- /*
+ /*
+ * Disable interrupt and save the current state
+ */
+ flag = disable_interrupts();
+
+ /*
* Enable MCLK BRG
*/
# if (MCLK_BRG == 0)
- immr->im_brgc1 = mclk_brg;
+ *IM_BRGC1 = mclk_brg;
# endif
# if (MCLK_BRG == 1)
- immr->im_brgc2 = mclk_brg;
+ *IM_BRGC2 = mclk_brg;
# endif
# if (MCLK_BRG == 2)
- immr->im_brgc3 = mclk_brg;
+ *IM_BRGC3 = mclk_brg;
# endif
# if (MCLK_BRG == 3)
- immr->im_brgc4 = mclk_brg;
+ *IM_BRGC4 = mclk_brg;
# endif
# if (MCLK_BRG == 4)
- immr->im_brgc5 = mclk_brg;
+ *IM_BRGC5 = mclk_brg;
# endif
# if (MCLK_BRG == 5)
- immr->im_brgc6 = mclk_brg;
+ *IM_BRGC6 = mclk_brg;
# endif
# if (MCLK_BRG == 6)
- immr->im_brgc7 = mclk_brg;
+ *IM_BRGC7 = mclk_brg;
# endif
# if (MCLK_BRG == 7)
- immr->im_brgc8 = mclk_brg;
+ *IM_BRGC8 = mclk_brg;
# endif
- /*
+ /*
* Enable SCLK BRG
*/
# if (SCLK_BRG == 0)
- immr->im_brgc1 = sclk_brg;
+ *IM_BRGC1 = sclk_brg;
# endif
# if (SCLK_BRG == 1)
- immr->im_brgc2 = sclk_brg;
+ *IM_BRGC2 = sclk_brg;
# endif
# if (SCLK_BRG == 2)
- immr->im_brgc3 = sclk_brg;
+ *IM_BRGC3 = sclk_brg;
# endif
# if (SCLK_BRG == 3)
- immr->im_brgc4 = sclk_brg;
+ *IM_BRGC4 = sclk_brg;
# endif
# if (SCLK_BRG == 4)
- immr->im_brgc5 = sclk_brg;
+ *IM_BRGC5 = sclk_brg;
# endif
# if (SCLK_BRG == 5)
- immr->im_brgc6 = sclk_brg;
+ *IM_BRGC6 = sclk_brg;
# endif
# if (SCLK_BRG == 6)
- immr->im_brgc7 = sclk_brg;
+ *IM_BRGC7 = sclk_brg;
# endif
# if (SCLK_BRG == 7)
- immr->im_brgc8 = sclk_brg;
+ *IM_BRGC8 = sclk_brg;
# endif
- /*
+ /*
* Enable LRCLK BRG (1st time - temporary)
*/
# if (LRCLK_BRG == 0)
- immr->im_brgc1 = temp_lrclk_brg;
+ *IM_BRGC1 = temp_lrclk_brg;
# endif
# if (LRCLK_BRG == 1)
- immr->im_brgc2 = temp_lrclk_brg;
+ *IM_BRGC2 = temp_lrclk_brg;
# endif
# if (LRCLK_BRG == 2)
- immr->im_brgc3 = temp_lrclk_brg;
+ *IM_BRGC3 = temp_lrclk_brg;
# endif
# if (LRCLK_BRG == 3)
- immr->im_brgc4 = temp_lrclk_brg;
+ *IM_BRGC4 = temp_lrclk_brg;
# endif
# if (LRCLK_BRG == 4)
- immr->im_brgc5 = temp_lrclk_brg;
+ *IM_BRGC5 = temp_lrclk_brg;
# endif
# if (LRCLK_BRG == 5)
- immr->im_brgc6 = temp_lrclk_brg;
+ *IM_BRGC6 = temp_lrclk_brg;
# endif
# if (LRCLK_BRG == 6)
- immr->im_brgc7 = temp_lrclk_brg;
+ *IM_BRGC7 = temp_lrclk_brg;
# endif
# if (LRCLK_BRG == 7)
- immr->im_brgc8 = temp_lrclk_brg;
+ *IM_BRGC8 = temp_lrclk_brg;
# endif
-
- /*
+
+ /*
* Enable LRCLK BRG (2nd time - permanent)
*/
# if (LRCLK_BRG == 0)
- immr->im_brgc1 = real_lrclk_brg;
+ *IM_BRGC1 = real_lrclk_brg;
# endif
# if (LRCLK_BRG == 1)
- immr->im_brgc2 = real_lrclk_brg;
+ *IM_BRGC2 = real_lrclk_brg;
# endif
# if (LRCLK_BRG == 2)
- immr->im_brgc3 = real_lrclk_brg;
+ *IM_BRGC3 = real_lrclk_brg;
# endif
# if (LRCLK_BRG == 3)
- immr->im_brgc4 = real_lrclk_brg;
+ *IM_BRGC4 = real_lrclk_brg;
# endif
# if (LRCLK_BRG == 4)
- immr->im_brgc5 = real_lrclk_brg;
+ *IM_BRGC5 = real_lrclk_brg;
# endif
# if (LRCLK_BRG == 5)
- immr->im_brgc6 = real_lrclk_brg;
+ *IM_BRGC6 = real_lrclk_brg;
# endif
# if (LRCLK_BRG == 6)
- immr->im_brgc7 = real_lrclk_brg;
+ *IM_BRGC7 = real_lrclk_brg;
# endif
# if (LRCLK_BRG == 7)
- immr->im_brgc8 = real_lrclk_brg;
+ *IM_BRGC8 = real_lrclk_brg;
# endif
+
+ /*
+ * Restore the Interrupt state
+ */
+ if (flag) {
+ enable_interrupts();
+ }
# else
/*
* Enable the clocks
diff --git a/board/sacsng/clkinit.h b/board/sacsng/clkinit.h
index 02086d4..2731f2e 100644
--- a/board/sacsng/clkinit.h
+++ b/board/sacsng/clkinit.h
@@ -61,6 +61,9 @@
/* The 8260 (Mask B.3) seems to have */
/* problems generating LRCLK from SCLK */
+#define NUM_LRCLKS_TO_STABILIZE 1 /* Number of LRCLK period (sample) */
+ /* to wait for the clock to stabilize */
+
#define CPM_CLK (gd->bd->bi_cpmfreq)
#define DFBRG 4
#define BRG_INT_CLK (CPM_CLK * 2 / DFBRG)
@@ -80,6 +83,15 @@
#define CPM_BRG_EXTC_CLK5 2
#define CPM_BRG_EXTC_CLK15 CPM_BRG_EXTC_CLK5
+#define IM_BRGC1 ((uint *)0xf00119f0)
+#define IM_BRGC2 ((uint *)0xf00119f4)
+#define IM_BRGC3 ((uint *)0xf00119f8)
+#define IM_BRGC4 ((uint *)0xf00119fc)
+#define IM_BRGC5 ((uint *)0xf00115f0)
+#define IM_BRGC6 ((uint *)0xf00115f4)
+#define IM_BRGC7 ((uint *)0xf00115f8)
+#define IM_BRGC8 ((uint *)0xf00115fc)
+
/*
* External declarations
*/
@@ -105,7 +117,6 @@
extern uint Daq_BRG_Rate(uint brg);
extern uint Daq_Get_SampleRate(void);
-extern uint Daq_Set_SampleRate(uint rate, uint force);
extern void Daq_Init_Clocks(int sample_rate, int sample_64x);
extern void Daq_Stop_Clocks(void);
diff --git a/board/sacsng/sacsng.c b/board/sacsng/sacsng.c
index 0f0f0e6..19dbb97 100644
--- a/board/sacsng/sacsng.c
+++ b/board/sacsng/sacsng.c
@@ -26,7 +26,6 @@
#include <common.h>
#include <ioports.h>
#include <mpc8260.h>
-/*NO// #include <memtest.h> */
#include <i2c.h>
#include <spi.h>
@@ -486,9 +485,25 @@
}
}
+ /*
+ * Stop the clocks and wait for at least 1 LRCLK period
+ * to make sure the clocking has really stopped.
+ */
+ Daq_Stop_Clocks();
+ udelay((1000000 / sample_rate) * NUM_LRCLKS_TO_STABILIZE);
+
+ /*
+ * Initialize the clocks with the new rates
+ */
Daq_Init_Clocks(sample_rate, sample_64x);
sample_rate = Daq_Get_SampleRate();
+
+ /*
+ * Start the clocks and wait for at least 1 LRCLK period
+ * to make sure the clocking has become stable.
+ */
Daq_Start_Clocks(sample_rate);
+ udelay((1000000 / sample_rate) * NUM_LRCLKS_TO_STABILIZE);
sprintf(str_buf, "%d", sample_rate);
setenv("DaqSampleRate", str_buf);
@@ -792,10 +807,12 @@
* chip selects: it calls the appropriate function to control the SPI
* chip selects.
*/
-spi_chipsel_type spi_chipsel[2] = {
+spi_chipsel_type spi_chipsel[] = {
spi_adc_chipsel,
spi_dac_chipsel
};
+int spi_chipsel_cnt = sizeof(spi_chipsel) / sizeof(spi_chipsel[0]);
+
#endif /* CFG_CMD_SPI */
#endif /* CONFIG_MISC_INIT_R */
diff --git a/common/cmd_elf.c b/common/cmd_elf.c
index 88744b4..149ffa3 100644
--- a/common/cmd_elf.c
+++ b/common/cmd_elf.c
@@ -111,7 +111,7 @@
/* Check to see if we need to tftp the image ourselves before starting */
if ((argc == 2) && (strcmp (argv[1], "tftp") == 0)) {
- if (NetLoop (TFTP) == 0)
+ if (NetLoop (TFTP) <= 0)
return 1;
printf ("Automatic boot of VxWorks image at address 0x%08lx ... \n", addr);
}
diff --git a/common/cmd_net.c b/common/cmd_net.c
index c9ce85f..a1ff2ba 100644
--- a/common/cmd_net.c
+++ b/common/cmd_net.c
@@ -132,12 +132,16 @@
return 1;
}
- if ((size = NetLoop(proto)) == 0)
+ if ((size = NetLoop(proto)) < 0)
return 1;
/* NetLoop ok, update environment */
netboot_update_env();
+ /* done if no file was loaded (no errors though) */
+ if (size == 0)
+ return 0;
+
/* flush cache */
flush_cache(load_addr, size);
diff --git a/common/cmd_spi.c b/common/cmd_spi.c
index ccf9cc2..d544b27 100644
--- a/common/cmd_spi.c
+++ b/common/cmd_spi.c
@@ -32,14 +32,20 @@
#if (CONFIG_COMMANDS & CFG_CMD_SPI)
-#define MAX_SPI_BYTES 32 /* max number of bytes we can handle */
+/*-----------------------------------------------------------------------
+ * Definitions
+ */
+
+#ifndef MAX_SPI_BYTES
+# define MAX_SPI_BYTES 32 /* Maximum number of bytes we can handle */
+#endif
/*
* External table of chip select functions (see the appropriate board
* support for the actual definition of the table).
*/
extern spi_chipsel_type spi_chipsel[];
-
+extern int spi_chipsel_cnt;
/*
* Values from last command.
@@ -60,7 +66,7 @@
* The command prints out the hexadecimal string received via SPI.
*/
-int do_spi (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[])
+int do_spi (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
char *cp = 0;
uchar tmp;
@@ -78,26 +84,38 @@
device = simple_strtoul(argv[1], NULL, 10);
if (argc >= 3)
bitlen = simple_strtoul(argv[2], NULL, 10);
- if (argc >= 4)
- cp = argv[3];
- for(j = 0; *cp; j++, cp++) {
- tmp = *cp - '0';
- if(tmp > 9)
- tmp -= ('A' - '0') - 10;
- if(tmp > 15)
- tmp -= ('a' - 'A');
- if(tmp > 15) {
- printf("Conversion error on %c, bailing out.\n", *cp);
- break;
+ if (argc >= 4) {
+ cp = argv[3];
+ for(j = 0; *cp; j++, cp++) {
+ tmp = *cp - '0';
+ if(tmp > 9)
+ tmp -= ('A' - '0') - 10;
+ if(tmp > 15)
+ tmp -= ('a' - 'A');
+ if(tmp > 15) {
+ printf("Hex conversion error on %c, giving up.\n", *cp);
+ return 1;
+ }
+ if((j % 2) == 0)
+ dout[j / 2] = (tmp << 4);
+ else
+ dout[j / 2] |= tmp;
}
- if((j % 2) == 0)
- dout[j / 2] = (tmp << 4);
- else
- dout[j / 2] |= tmp;
}
}
-printf("spi_chipsel[%d] = %08X\n", device, (uint)spi_chipsel[device]);
+ if ((device < 0) || (device >= spi_chipsel_cnt)) {
+ printf("Invalid device %d, giving up.\n", device);
+ return 1;
+ }
+ if ((bitlen < 0) || (bitlen > (MAX_SPI_BYTES * 8))) {
+ printf("Invalid bitlen %d, giving up.\n", bitlen);
+ return 1;
+ }
+
+ debug ("spi_chipsel[%d] = %08X\n",
+ device, (uint)spi_chipsel[device]);
+
if(spi_xfer(spi_chipsel[device], bitlen, dout, din) != 0) {
printf("Error with the SPI transaction.\n");
rcode = 1;
@@ -113,4 +131,3 @@
}
#endif /* CFG_CMD_SPI */
-
diff --git a/common/command.c b/common/command.c
index db39b41..f70cad8 100644
--- a/common/command.c
+++ b/common/command.c
@@ -46,6 +46,7 @@
#include <cmd_eeprom.h>
#include <cmd_i2c.h>
+#include <cmd_spi.h>
#include <cmd_immap.h>
#include <cmd_rtc.h>
@@ -316,6 +317,7 @@
CMD_TBL_MISC /* sleep */
CMD_TBL_SMCINFO
CMD_TBL_SPIINFO
+ CMD_TBL_SPI
CMD_TBL_STACK
CMD_TBL_STEP
CMD_TBL_TFTPB
diff --git a/common/soft_spi.c b/common/soft_spi.c
index a5b62f2..b9a8fa8 100644
--- a/common/soft_spi.c
+++ b/common/soft_spi.c
@@ -29,9 +29,6 @@
#if defined(CONFIG_SOFT_SPI)
-#define DEBUG_SPI
-
-
/*-----------------------------------------------------------------------
* Definitions
*/