[PATCH v3] Add sync to ensure flash_write_cmd is fully finished
Some CPUs like PPC, BLACKFIN need sync() to ensure cfi flash write command
is fully finished. The sync() is defined in each CPU's io.h file. For
those CPUs which do not need sync for now, a dummy sync() is defined in
their io.h as well.
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
diff --git a/drivers/cfi_flash.c b/drivers/cfi_flash.c
index 696f9a4..5579a1e 100644
--- a/drivers/cfi_flash.c
+++ b/drivers/cfi_flash.c
@@ -36,6 +36,7 @@
#include <common.h>
#include <asm/processor.h>
+#include <asm/io.h>
#include <asm/byteorder.h>
#include <environment.h>
#ifdef CFG_FLASH_CFI_DRIVER
@@ -931,27 +932,18 @@
debug ("fwc addr %p cmd %x %x 8bit x %d bit\n", addr.cp, cmd,
cword.c, info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
*addr.cp = cword.c;
-#ifdef CONFIG_BLACKFIN
- asm("ssync;");
-#endif
break;
case FLASH_CFI_16BIT:
debug ("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr.wp,
cmd, cword.w,
info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
*addr.wp = cword.w;
-#ifdef CONFIG_BLACKFIN
- asm("ssync;");
-#endif
break;
case FLASH_CFI_32BIT:
debug ("fwc addr %p cmd %x %8.8lx 32bit x %d bit\n", addr.lp,
cmd, cword.l,
info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
*addr.lp = cword.l;
-#ifdef CONFIG_BLACKFIN
- asm("ssync;");
-#endif
break;
case FLASH_CFI_64BIT:
#ifdef DEBUG
@@ -966,11 +958,11 @@
}
#endif
*addr.llp = cword.ll;
-#ifdef CONFIG_BLACKFIN
- asm("ssync;");
-#endif
break;
}
+
+ /* Ensure all the instructions are fully finished */
+ sync();
}
static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect)
diff --git a/include/asm-arm/io.h b/include/asm-arm/io.h
index 648a10d..47c18e7 100644
--- a/include/asm-arm/io.h
+++ b/include/asm-arm/io.h
@@ -29,6 +29,10 @@
#include <asm/arch/hardware.h>
#endif /* XXX###XXX */
+static inline void sync(void)
+{
+}
+
/*
* Generic virtual read/write. Note that we don't support half-word
* read/writes. We define __arch_*[bl] here, and leave __arch_*w
diff --git a/include/asm-avr32/io.h b/include/asm-avr32/io.h
index e86c456..3c0d569 100644
--- a/include/asm-avr32/io.h
+++ b/include/asm-avr32/io.h
@@ -89,4 +89,8 @@
#endif /* __KERNEL__ */
+static inline void sync(void)
+{
+}
+
#endif /* __ASM_AVR32_IO_H */
diff --git a/include/asm-blackfin/io.h b/include/asm-blackfin/io.h
index e5b388e..fc27194 100644
--- a/include/asm-blackfin/io.h
+++ b/include/asm-blackfin/io.h
@@ -25,6 +25,11 @@
#ifndef _BLACKFIN_IO_H
#define _BLACKFIN_IO_H
+static inline void sync(void)
+{
+ __asm__ __volatile__ asm("ssync" : : : "memory");
+}
+
#ifdef __KERNEL__
#include <linux/config.h>
diff --git a/include/asm-i386/io.h b/include/asm-i386/io.h
index 85d44aa..e64d788 100644
--- a/include/asm-i386/io.h
+++ b/include/asm-i386/io.h
@@ -201,4 +201,8 @@
__OUTS(w)
__OUTS(l)
+static inline void sync(void)
+{
+}
+
#endif
diff --git a/include/asm-m68k/io.h b/include/asm-m68k/io.h
index 79a9626..7bbdefb 100644
--- a/include/asm-m68k/io.h
+++ b/include/asm-m68k/io.h
@@ -1 +1,8 @@
-/* */
+#ifndef __ASM_M68K_IO_H_
+#define __ASM_M68K_IO_H_
+
+static inline void sync(void)
+{
+}
+
+#endif /* __ASM_M68K_IO_H_ */
diff --git a/include/asm-microblaze/io.h b/include/asm-microblaze/io.h
index 3359045..1c77ade 100644
--- a/include/asm-microblaze/io.h
+++ b/include/asm-microblaze/io.h
@@ -125,4 +125,8 @@
#define ioremap_writethrough(physaddr, size) (physaddr)
#define ioremap_fullcache(physaddr, size) (physaddr)
+static inline void sync(void)
+{
+}
+
#endif /* __MICROBLAZE_IO_H__ */
diff --git a/include/asm-mips/io.h b/include/asm-mips/io.h
index 857fb03..cd4d5dc 100644
--- a/include/asm-mips/io.h
+++ b/include/asm-mips/io.h
@@ -447,4 +447,8 @@
#define dma_cache_wback(start,size) _dma_cache_wback(start,size)
#define dma_cache_inv(start,size) _dma_cache_inv(start,size)
+static inline void sync(void)
+{
+}
+
#endif /* _ASM_IO_H */
diff --git a/include/asm-nios/io.h b/include/asm-nios/io.h
index 07499d9..d77695a 100644
--- a/include/asm-nios/io.h
+++ b/include/asm-nios/io.h
@@ -97,4 +97,8 @@
while (count--) outl (*p++, port);
}
+static inline void sync(void)
+{
+}
+
#endif /* __ASM_NIOS_IO_H_ */
diff --git a/include/asm-nios2/io.h b/include/asm-nios2/io.h
index 0fab53b..5bb5322 100644
--- a/include/asm-nios2/io.h
+++ b/include/asm-nios2/io.h
@@ -24,7 +24,10 @@
#ifndef __ASM_NIOS2_IO_H_
#define __ASM_NIOS2_IO_H_
-#define sync() asm volatile ("sync" : : : "memory");
+static inline void sync(void)
+{
+ __asm__ __volatile__ ("sync" : : : "memory");
+}
extern unsigned char inb (unsigned char *port);
extern unsigned short inw (unsigned short *port);
diff --git a/include/asm-ppc/io.h b/include/asm-ppc/io.h
index 8e5fe11..bbc9ba0 100644
--- a/include/asm-ppc/io.h
+++ b/include/asm-ppc/io.h
@@ -95,8 +95,15 @@
* Acts as a barrier to ensure all previous I/O accesses have
* completed before any further ones are issued.
*/
-#define eieio() __asm__ __volatile__ ("eieio" : : : "memory");
-#define sync() __asm__ __volatile__ ("sync" : : : "memory");
+static inline void eieio(void)
+{
+ __asm__ __volatile__ ("eieio" : : : "memory");
+}
+
+static inline void sync(void)
+{
+ __asm__ __volatile__ ("sync" : : : "memory");
+}
/* Enforce in-order execution of data I/O.
* No distinction between read/write on PPC; use eieio for all three.