| commit | c1157dcf3a607844f1cff4e6d639f49d87f88945 | [log] [tgz] |
|---|---|---|
| author | Jagan Teki <jagan@amarulasolutions.com> | Wed May 06 13:20:25 2020 +0530 |
| committer | Marek Vasut <marek.vasut+renesas@gmail.com> | Tue May 12 09:27:14 2020 +0200 |
| tree | e7779bdb0532ba68bcdd12abb3fe4fe60211646e | |
| parent | 011c9bc6f1382282cbeee6f718a1345a397955e6 [diff] |
usb: dwc3: add dis_del_phy_power_chg_quirk
Add a quirk to clear the GUSB3PIPECTL.DELAYP1TRANS bit,
which specifies whether disable delay PHY power change
from P0 to P1/P2/P3 when link state changing from U0
to U1/U2/U3 respectively.
Reference from below Linux commit,
commit <00fe081dc3a3> ("usb: dwc3: add dis_del_phy_power_chg_quirk")
Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>