commit c0890d2e0e2b8e7717428d4b8dd3e7f1d03eb0ac
author Marek Vasut <marex@denx.de> Thu Sep 21 20:44:19 2023 +0200
committer Stefano Babic <sbabic@denx.de> Mon Oct 16 16:25:10 2023 +0200
tree bcd5c1594dc8540d4e7568492fa5182edf43ab58
parent 792cb56fe2a8817370838812f50ac1b192ae4618

arm64: dts: imx8mp: Drop i.MX8MP DHCOM rev.100 PHY address workaround from PDK3 DT

In case the i.MX8MP DHCOM rev.100 has been populated on the PDK3
carrier board, the on-SoM PHY PHYAD1 signal has been pulled high
by the carrier board and changed the PHY MDIO address from 5 to 7.
This has been fixed on production rev.200 SoM by additional buffer
on the SoM PHYAD/LED signals, remove the workaround.

Signed-off-by: Marek Vasut <marex@denx.de>

arch/arm/dts/imx8mp-dhcom-pdk3.dts

diff --git a/arch/arm/dts/imx8mp-dhcom-pdk3.dts b/arch/arm/dts/imx8mp-dhcom-pdk3.dts
index c5f0607..867d238 100644
--- a/arch/arm/dts/imx8mp-dhcom-pdk3.dts
+++ b/arch/arm/dts/imx8mp-dhcom-pdk3.dts
@@ -227,10 +227,6 @@
 	};
 };
 
-&ethphy0g {
-	reg = <7>;
-};
-
 &fec {	/* Second ethernet */
 	pinctrl-0 = <&pinctrl_fec_rgmii>;
 	phy-handle = <&ethphypdk>;