Merge tag 'efi-2021-04-rc1-2' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi
Pull request for UEFI sub-system for efi-2021-04-rc1-2
* Provide a test tool for initial RAM disk provided via load file2 protocol.
* Make more items configurable to reduce code size:
* Boot manager
* EFI_DT_FIXUP_PROTOCOL
* EFI_DEVICE_PATH_UTILITIES_PROTOCOL
* Bug fixes
* avoid EFI runtime symbols in global symbol table
diff --git a/board/xilinx/common/board.c b/board/xilinx/common/board.c
index cdc06a3..df19aea 100644
--- a/board/xilinx/common/board.c
+++ b/board/xilinx/common/board.c
@@ -324,25 +324,30 @@
{
void *fdt_blob;
-#if !defined(CONFIG_VERSAL_NO_DDR) && !defined(CONFIG_ZYNQMP_NO_DDR)
- fdt_blob = (void *)CONFIG_XILINX_OF_BOARD_DTB_ADDR;
+ if (!IS_ENABLED(CONFIG_SPL_BUILD) &&
+ !IS_ENABLED(CONFIG_VERSAL_NO_DDR) &&
+ !IS_ENABLED(CONFIG_VERSAL_NO_DDR)) {
+ fdt_blob = (void *)CONFIG_XILINX_OF_BOARD_DTB_ADDR;
- if (fdt_magic(fdt_blob) == FDT_MAGIC)
- return fdt_blob;
+ if (fdt_magic(fdt_blob) == FDT_MAGIC)
+ return fdt_blob;
- debug("DTB is not passed via %p\n", fdt_blob);
-#endif
+ debug("DTB is not passed via %p\n", fdt_blob);
+ }
-#ifdef CONFIG_SPL_BUILD
- /* FDT is at end of BSS unless it is in a different memory region */
- if (IS_ENABLED(CONFIG_SPL_SEPARATE_BSS))
- fdt_blob = (ulong *)&_image_binary_end;
- else
- fdt_blob = (ulong *)&__bss_end;
-#else
- /* FDT is at end of image */
- fdt_blob = (ulong *)&_end;
-#endif
+ if (IS_ENABLED(CONFIG_SPL_BUILD)) {
+ /*
+ * FDT is at end of BSS unless it is in a different memory
+ * region
+ */
+ if (IS_ENABLED(CONFIG_SPL_SEPARATE_BSS))
+ fdt_blob = (ulong *)&_image_binary_end;
+ else
+ fdt_blob = (ulong *)&__bss_end;
+ } else {
+ /* FDT is at end of image */
+ fdt_blob = (ulong *)&_end;
+ }
if (fdt_magic(fdt_blob) == FDT_MAGIC)
return fdt_blob;
diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c
index 047b070..459d9b1 100644
--- a/board/xilinx/zynqmp/zynqmp.c
+++ b/board/xilinx/zynqmp/zynqmp.c
@@ -648,6 +648,7 @@
if (bootseq >= 0) {
bootseq_len = snprintf(NULL, 0, "%i", bootseq);
debug("Bootseq len: %x\n", bootseq_len);
+ env_set_hex("bootseq", bootseq);
}
/*
diff --git a/configs/xilinx_zynqmp_virt_defconfig b/configs/xilinx_zynqmp_virt_defconfig
index e400cd4..0bf4b7d 100644
--- a/configs/xilinx_zynqmp_virt_defconfig
+++ b/configs/xilinx_zynqmp_virt_defconfig
@@ -54,6 +54,7 @@
CONFIG_CMD_USB=y
CONFIG_CMD_USB_MASS_STORAGE=y
CONFIG_CMD_TFTPPUT=y
+CONFIG_CMD_BMP=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
CONFIG_CMD_TIMER=y
@@ -155,6 +156,15 @@
CONFIG_USB_ETH_CDC=y
CONFIG_USB_HOST_ETHER=y
CONFIG_USB_ETHER_ASIX=y
+CONFIG_DM_VIDEO=y
+CONFIG_VIDEO_COPY=y
+CONFIG_DISPLAY=y
+CONFIG_VIDEO_SEPS525=y
+CONFIG_LCD=y
+CONFIG_SPLASH_SCREEN=y
+CONFIG_BMP_16BPP=y
+CONFIG_BMP_24BPP=y
+CONFIG_BMP_32BPP=y
CONFIG_WDT=y
CONFIG_WDT_CDNS=y
CONFIG_PANIC_HANG=y
diff --git a/drivers/mmc/xenon_sdhci.c b/drivers/mmc/xenon_sdhci.c
index b8e833e..14fec4b 100644
--- a/drivers/mmc/xenon_sdhci.c
+++ b/drivers/mmc/xenon_sdhci.c
@@ -104,18 +104,6 @@
/* Hyperion only have one slot 0 */
#define XENON_MMC_SLOT_ID_HYPERION 0
-#define MMC_TIMING_LEGACY 0
-#define MMC_TIMING_MMC_HS 1
-#define MMC_TIMING_SD_HS 2
-#define MMC_TIMING_UHS_SDR12 3
-#define MMC_TIMING_UHS_SDR25 4
-#define MMC_TIMING_UHS_SDR50 5
-#define MMC_TIMING_UHS_SDR104 6
-#define MMC_TIMING_UHS_DDR50 7
-#define MMC_TIMING_MMC_DDR52 8
-#define MMC_TIMING_MMC_HS200 9
-#define MMC_TIMING_MMC_HS400 10
-
#define XENON_MMC_MAX_CLK 400000000
#define XENON_MMC_3V3_UV 3300000
#define XENON_MMC_1V8_UV 1800000
diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c
index 45a1648..9444129 100644
--- a/drivers/net/dwc_eth_qos.c
+++ b/drivers/net/dwc_eth_qos.c
@@ -209,6 +209,7 @@
#define EQOS_DMA_SYSBUS_MODE_BLEN8 BIT(2)
#define EQOS_DMA_SYSBUS_MODE_BLEN4 BIT(1)
+#define EQOS_DMA_CH0_CONTROL_DSL_SHIFT 18
#define EQOS_DMA_CH0_CONTROL_PBLX8 BIT(16)
#define EQOS_DMA_CH0_TX_CONTROL_TXPBL_SHIFT 16
@@ -239,37 +240,15 @@
#define EQOS_AUTO_CAL_STATUS_ACTIVE BIT(31)
/* Descriptors */
-
-#define EQOS_DESCRIPTOR_WORDS 4
-#define EQOS_DESCRIPTOR_SIZE (EQOS_DESCRIPTOR_WORDS * 4)
/* We assume ARCH_DMA_MINALIGN >= 16; 16 is the EQOS HW minimum */
#define EQOS_DESCRIPTOR_ALIGN ARCH_DMA_MINALIGN
#define EQOS_DESCRIPTORS_TX 4
#define EQOS_DESCRIPTORS_RX 4
#define EQOS_DESCRIPTORS_NUM (EQOS_DESCRIPTORS_TX + EQOS_DESCRIPTORS_RX)
-#define EQOS_DESCRIPTORS_SIZE ALIGN(EQOS_DESCRIPTORS_NUM * \
- EQOS_DESCRIPTOR_SIZE, ARCH_DMA_MINALIGN)
#define EQOS_BUFFER_ALIGN ARCH_DMA_MINALIGN
#define EQOS_MAX_PACKET_SIZE ALIGN(1568, ARCH_DMA_MINALIGN)
#define EQOS_RX_BUFFER_SIZE (EQOS_DESCRIPTORS_RX * EQOS_MAX_PACKET_SIZE)
-/*
- * Warn if the cache-line size is larger than the descriptor size. In such
- * cases the driver will likely fail because the CPU needs to flush the cache
- * when requeuing RX buffers, therefore descriptors written by the hardware
- * may be discarded. Architectures with full IO coherence, such as x86, do not
- * experience this issue, and hence are excluded from this condition.
- *
- * This can be fixed by defining CONFIG_SYS_NONCACHED_MEMORY which will cause
- * the driver to allocate descriptors from a pool of non-cached memory.
- */
-#if EQOS_DESCRIPTOR_SIZE < ARCH_DMA_MINALIGN
-#if !defined(CONFIG_SYS_NONCACHED_MEMORY) && \
- !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) && !defined(CONFIG_X86)
-#warning Cache line size is larger than descriptor size
-#endif
-#endif
-
struct eqos_desc {
u32 des0;
u32 des1;
@@ -282,12 +261,17 @@
#define EQOS_DESC3_LD BIT(28)
#define EQOS_DESC3_BUF1V BIT(24)
+#define EQOS_AXI_WIDTH_32 4
+#define EQOS_AXI_WIDTH_64 8
+#define EQOS_AXI_WIDTH_128 16
+
struct eqos_config {
bool reg_access_always_ok;
int mdio_wait;
int swr_wait;
int config_mac;
int config_mac_mdio;
+ unsigned int axi_bus_width;
phy_interface_t (*interface)(struct udevice *dev);
struct eqos_ops *ops;
};
@@ -330,9 +314,8 @@
int phyaddr;
u32 max_speed;
void *descs;
- struct eqos_desc *tx_descs;
- struct eqos_desc *rx_descs;
int tx_desc_idx, rx_desc_idx;
+ unsigned int desc_size;
void *tx_dma_buf;
void *rx_dma_buf;
void *rx_pkt;
@@ -358,63 +341,42 @@
* not have the same constraints since they are 1536 bytes large, so they
* are unlikely to share cache-lines.
*/
-static void *eqos_alloc_descs(unsigned int num)
+static void *eqos_alloc_descs(struct eqos_priv *eqos, unsigned int num)
{
-#ifdef CONFIG_SYS_NONCACHED_MEMORY
- return (void *)noncached_alloc(EQOS_DESCRIPTORS_SIZE,
- EQOS_DESCRIPTOR_ALIGN);
-#else
- return memalign(EQOS_DESCRIPTOR_ALIGN, EQOS_DESCRIPTORS_SIZE);
-#endif
+ eqos->desc_size = ALIGN(sizeof(struct eqos_desc),
+ (unsigned int)ARCH_DMA_MINALIGN);
+
+ return memalign(eqos->desc_size, num * eqos->desc_size);
}
static void eqos_free_descs(void *descs)
{
-#ifdef CONFIG_SYS_NONCACHED_MEMORY
- /* FIXME: noncached_alloc() has no opposite */
-#else
free(descs);
-#endif
}
-static void eqos_inval_desc_tegra186(void *desc)
+static struct eqos_desc *eqos_get_desc(struct eqos_priv *eqos,
+ unsigned int num, bool rx)
{
-#ifndef CONFIG_SYS_NONCACHED_MEMORY
- unsigned long start = (unsigned long)desc & ~(ARCH_DMA_MINALIGN - 1);
- unsigned long end = ALIGN(start + EQOS_DESCRIPTOR_SIZE,
- ARCH_DMA_MINALIGN);
-
- invalidate_dcache_range(start, end);
-#endif
+ return eqos->descs +
+ ((rx ? EQOS_DESCRIPTORS_TX : 0) + num) * eqos->desc_size;
}
static void eqos_inval_desc_generic(void *desc)
{
-#ifndef CONFIG_SYS_NONCACHED_MEMORY
- unsigned long start = rounddown((unsigned long)desc, ARCH_DMA_MINALIGN);
- unsigned long end = roundup((unsigned long)desc + EQOS_DESCRIPTOR_SIZE,
- ARCH_DMA_MINALIGN);
+ unsigned long start = (unsigned long)desc;
+ unsigned long end = ALIGN(start + sizeof(struct eqos_desc),
+ ARCH_DMA_MINALIGN);
invalidate_dcache_range(start, end);
-#endif
-}
-
-static void eqos_flush_desc_tegra186(void *desc)
-{
-#ifndef CONFIG_SYS_NONCACHED_MEMORY
- flush_cache((unsigned long)desc, EQOS_DESCRIPTOR_SIZE);
-#endif
}
static void eqos_flush_desc_generic(void *desc)
{
-#ifndef CONFIG_SYS_NONCACHED_MEMORY
- unsigned long start = rounddown((unsigned long)desc, ARCH_DMA_MINALIGN);
- unsigned long end = roundup((unsigned long)desc + EQOS_DESCRIPTOR_SIZE,
- ARCH_DMA_MINALIGN);
+ unsigned long start = (unsigned long)desc;
+ unsigned long end = ALIGN(start + sizeof(struct eqos_desc),
+ ARCH_DMA_MINALIGN);
flush_dcache_range(start, end);
-#endif
}
static void eqos_inval_buffer_tegra186(void *buf, size_t size)
@@ -1167,6 +1129,7 @@
ulong rate;
u32 val, tx_fifo_sz, rx_fifo_sz, tqs, rqs, pbl;
ulong last_rx_desc;
+ ulong desc_pad;
debug("%s(dev=%p):\n", __func__, dev);
@@ -1405,8 +1368,12 @@
EQOS_MAX_PACKET_SIZE <<
EQOS_DMA_CH0_RX_CONTROL_RBSZ_SHIFT);
+ desc_pad = (eqos->desc_size - sizeof(struct eqos_desc)) /
+ eqos->config->axi_bus_width;
+
setbits_le32(&eqos->dma_regs->ch0_control,
- EQOS_DMA_CH0_CONTROL_PBLX8);
+ EQOS_DMA_CH0_CONTROL_PBLX8 |
+ (desc_pad << EQOS_DMA_CH0_CONTROL_DSL_SHIFT));
/*
* Burst length must be < 1/2 FIFO size.
@@ -1435,9 +1402,15 @@
/* Set up descriptors */
+ memset(eqos->descs, 0, eqos->desc_size * EQOS_DESCRIPTORS_NUM);
+
- memset(eqos->descs, 0, EQOS_DESCRIPTORS_SIZE);
+ for (i = 0; i < EQOS_DESCRIPTORS_TX; i++) {
+ struct eqos_desc *tx_desc = eqos_get_desc(eqos, i, false);
+ eqos->config->ops->eqos_flush_desc(tx_desc);
+ }
+
for (i = 0; i < EQOS_DESCRIPTORS_RX; i++) {
- struct eqos_desc *rx_desc = &(eqos->rx_descs[i]);
+ struct eqos_desc *rx_desc = eqos_get_desc(eqos, i, true);
rx_desc->des0 = (u32)(ulong)(eqos->rx_dma_buf +
(i * EQOS_MAX_PACKET_SIZE));
rx_desc->des3 = EQOS_DESC3_OWN | EQOS_DESC3_BUF1V;
@@ -1449,12 +1422,14 @@
}
writel(0, &eqos->dma_regs->ch0_txdesc_list_haddress);
- writel((ulong)eqos->tx_descs, &eqos->dma_regs->ch0_txdesc_list_address);
+ writel((ulong)eqos_get_desc(eqos, 0, false),
+ &eqos->dma_regs->ch0_txdesc_list_address);
writel(EQOS_DESCRIPTORS_TX - 1,
&eqos->dma_regs->ch0_txdesc_ring_length);
writel(0, &eqos->dma_regs->ch0_rxdesc_list_haddress);
- writel((ulong)eqos->rx_descs, &eqos->dma_regs->ch0_rxdesc_list_address);
+ writel((ulong)eqos_get_desc(eqos, 0, true),
+ &eqos->dma_regs->ch0_rxdesc_list_address);
writel(EQOS_DESCRIPTORS_RX - 1,
&eqos->dma_regs->ch0_rxdesc_ring_length);
@@ -1473,7 +1448,7 @@
* that's not distinguishable from none of the descriptors being
* available.
*/
- last_rx_desc = (ulong)&(eqos->rx_descs[(EQOS_DESCRIPTORS_RX - 1)]);
+ last_rx_desc = (ulong)eqos_get_desc(eqos, EQOS_DESCRIPTORS_RX - 1, true);
writel(last_rx_desc, &eqos->dma_regs->ch0_rxdesc_tail_pointer);
eqos->started = true;
@@ -1558,7 +1533,7 @@
memcpy(eqos->tx_dma_buf, packet, length);
eqos->config->ops->eqos_flush_buffer(eqos->tx_dma_buf, length);
- tx_desc = &(eqos->tx_descs[eqos->tx_desc_idx]);
+ tx_desc = eqos_get_desc(eqos, eqos->tx_desc_idx, false);
eqos->tx_desc_idx++;
eqos->tx_desc_idx %= EQOS_DESCRIPTORS_TX;
@@ -1573,7 +1548,7 @@
tx_desc->des3 = EQOS_DESC3_OWN | EQOS_DESC3_FD | EQOS_DESC3_LD | length;
eqos->config->ops->eqos_flush_desc(tx_desc);
- writel((ulong)(&(eqos->tx_descs[eqos->tx_desc_idx])),
+ writel((ulong)eqos_get_desc(eqos, eqos->tx_desc_idx, false),
&eqos->dma_regs->ch0_txdesc_tail_pointer);
for (i = 0; i < 1000000; i++) {
@@ -1596,7 +1571,7 @@
debug("%s(dev=%p, flags=%x):\n", __func__, dev, flags);
- rx_desc = &(eqos->rx_descs[eqos->rx_desc_idx]);
+ rx_desc = eqos_get_desc(eqos, eqos->rx_desc_idx, true);
eqos->config->ops->eqos_inval_desc(rx_desc);
if (rx_desc->des3 & EQOS_DESC3_OWN) {
debug("%s: RX packet not available\n", __func__);
@@ -1631,7 +1606,7 @@
eqos->config->ops->eqos_inval_buffer(packet, length);
- rx_desc = &(eqos->rx_descs[eqos->rx_desc_idx]);
+ rx_desc = eqos_get_desc(eqos, eqos->rx_desc_idx, true);
rx_desc->des0 = 0;
mb();
@@ -1663,17 +1638,12 @@
debug("%s(dev=%p):\n", __func__, dev);
- eqos->descs = eqos_alloc_descs(EQOS_DESCRIPTORS_TX +
- EQOS_DESCRIPTORS_RX);
+ eqos->descs = eqos_alloc_descs(eqos, EQOS_DESCRIPTORS_NUM);
if (!eqos->descs) {
debug("%s: eqos_alloc_descs() failed\n", __func__);
ret = -ENOMEM;
goto err;
}
- eqos->tx_descs = (struct eqos_desc *)eqos->descs;
- eqos->rx_descs = (eqos->tx_descs + EQOS_DESCRIPTORS_TX);
- debug("%s: tx_descs=%p, rx_descs=%p\n", __func__, eqos->tx_descs,
- eqos->rx_descs);
eqos->tx_dma_buf = memalign(EQOS_BUFFER_ALIGN, EQOS_MAX_PACKET_SIZE);
if (!eqos->tx_dma_buf) {
@@ -2083,8 +2053,8 @@
};
static struct eqos_ops eqos_tegra186_ops = {
- .eqos_inval_desc = eqos_inval_desc_tegra186,
- .eqos_flush_desc = eqos_flush_desc_tegra186,
+ .eqos_inval_desc = eqos_inval_desc_generic,
+ .eqos_flush_desc = eqos_flush_desc_generic,
.eqos_inval_buffer = eqos_inval_buffer_tegra186,
.eqos_flush_buffer = eqos_flush_buffer_tegra186,
.eqos_probe_resources = eqos_probe_resources_tegra186,
@@ -2105,6 +2075,7 @@
.swr_wait = 10,
.config_mac = EQOS_MAC_RXQ_CTRL0_RXQ0EN_ENABLED_DCB,
.config_mac_mdio = EQOS_MAC_MDIO_ADDRESS_CR_20_35,
+ .axi_bus_width = EQOS_AXI_WIDTH_128,
.interface = eqos_get_interface_tegra186,
.ops = &eqos_tegra186_ops
};
@@ -2132,6 +2103,7 @@
.swr_wait = 50,
.config_mac = EQOS_MAC_RXQ_CTRL0_RXQ0EN_ENABLED_AV,
.config_mac_mdio = EQOS_MAC_MDIO_ADDRESS_CR_250_300,
+ .axi_bus_width = EQOS_AXI_WIDTH_64,
.interface = eqos_get_interface_stm32,
.ops = &eqos_stm32_ops
};
@@ -2159,6 +2131,7 @@
.swr_wait = 50,
.config_mac = EQOS_MAC_RXQ_CTRL0_RXQ0EN_ENABLED_DCB,
.config_mac_mdio = EQOS_MAC_MDIO_ADDRESS_CR_250_300,
+ .axi_bus_width = EQOS_AXI_WIDTH_64,
.interface = eqos_get_interface_imx,
.ops = &eqos_imx_ops
};
diff --git a/drivers/net/e1000.c b/drivers/net/e1000.c
index 3b3dd10..7335883 100644
--- a/drivers/net/e1000.c
+++ b/drivers/net/e1000.c
@@ -869,7 +869,6 @@
return E1000_SUCCESS;
}
-#ifndef CONFIG_DM_ETH
/******************************************************************************
* e1000_write_eeprom_srwr - Write to Shadow Ram using EEWR
* @hw: pointer to the HW structure
@@ -1035,7 +1034,6 @@
out:
return ret_val;
}
-#endif
/******************************************************************************
* Verifies that the EEPROM has a valid checksum
@@ -5660,13 +5658,24 @@
return len ? 1 : 0;
}
+#endif /* !CONFIG_DM_ETH */
+#ifdef CONFIG_DM_ETH
+static int e1000_write_hwaddr(struct udevice *dev)
+#else
static int e1000_write_hwaddr(struct eth_device *dev)
+#endif
{
#ifndef CONFIG_E1000_NO_NVM
- unsigned char *mac = dev->enetaddr;
unsigned char current_mac[6];
+#ifdef CONFIG_DM_ETH
+ struct eth_pdata *plat = dev_get_plat(dev);
+ struct e1000_hw *hw = dev_get_priv(dev);
+ u8 *mac = plat->enetaddr;
+#else
struct e1000_hw *hw = dev->priv;
+ u8 *mac = dev->enetaddr;
+#endif
uint16_t data[3];
int ret_val, i;
@@ -5700,6 +5709,7 @@
#endif
}
+#ifndef CONFIG_DM_ETH
/**************************************************************************
PROBE - Look for an adapter, this routine's visible to the outside
You should omit the last argument struct pci_device * for a non-PCI NIC
@@ -5926,6 +5936,7 @@
.recv = e1000_eth_recv,
.stop = e1000_eth_stop,
.free_pkt = e1000_free_pkt,
+ .write_hwaddr = e1000_write_hwaddr,
};
static const struct udevice_id e1000_eth_ids[] = {
diff --git a/drivers/net/ftgmac100.c b/drivers/net/ftgmac100.c
index 69e299d..0687230 100644
--- a/drivers/net/ftgmac100.c
+++ b/drivers/net/ftgmac100.c
@@ -271,6 +271,28 @@
}
/*
+ * Get MAC address
+ */
+static int ftgmac100_get_mac(struct ftgmac100_data *priv,
+ unsigned char *mac)
+{
+ struct ftgmac100 *ftgmac100 = priv->iobase;
+ unsigned int maddr = readl(&ftgmac100->mac_madr);
+ unsigned int laddr = readl(&ftgmac100->mac_ladr);
+
+ debug("%s(%x %x)\n", __func__, maddr, laddr);
+
+ mac[0] = (maddr >> 8) & 0xff;
+ mac[1] = maddr & 0xff;
+ mac[2] = (laddr >> 24) & 0xff;
+ mac[3] = (laddr >> 16) & 0xff;
+ mac[4] = (laddr >> 8) & 0xff;
+ mac[5] = laddr & 0xff;
+
+ return 0;
+}
+
+/*
* disable transmitter, receiver
*/
static void ftgmac100_stop(struct udevice *dev)
@@ -511,6 +533,14 @@
return ftgmac100_set_mac(priv, pdata->enetaddr);
}
+static int ftgmac_read_hwaddr(struct udevice *dev)
+{
+ struct eth_pdata *pdata = dev_get_plat(dev);
+ struct ftgmac100_data *priv = dev_get_priv(dev);
+
+ return ftgmac100_get_mac(priv, pdata->enetaddr);
+}
+
static int ftgmac100_of_to_plat(struct udevice *dev)
{
struct eth_pdata *pdata = dev_get_plat(dev);
@@ -571,6 +601,8 @@
goto out;
}
+ ftgmac_read_hwaddr(dev);
+
out:
if (ret)
clk_release_bulk(&priv->clks);
diff --git a/drivers/net/ks8851_mll.c b/drivers/net/ks8851_mll.c
index 91c2d10..9dd9b33 100644
--- a/drivers/net/ks8851_mll.c
+++ b/drivers/net/ks8851_mll.c
@@ -251,7 +251,8 @@
}
ks_wrreg16(ks, KS_RXQCR, RXQCR_CMD_CNTL | RXQCR_RRXEF);
- printf(DRIVERNAME ": bad packet\n");
+ printf(DRIVERNAME ": bad packet (sts=0x%04x len=0x%04x)\n", sts, len);
+ ks->rxfc = 0;
return 0;
}
diff --git a/env/Kconfig b/env/Kconfig
index 67ce930..b473d7c 100644
--- a/env/Kconfig
+++ b/env/Kconfig
@@ -411,13 +411,14 @@
config SYS_REDUNDAND_ENVIRONMENT
bool "Enable redundant environment support"
- depends on ENV_IS_IN_EEPROM || ENV_IS_IN_FLASH || ENV_IS_IN_MMC || \
- ENV_IS_IN_NAND || ENV_IS_IN_SPI_FLASH || ENV_IS_IN_UBI
help
Normally, the environemt is stored in a single location. By
selecting this option, you can then define where to hold a redundant
copy of the environment data, so that there is a valid backup copy in
case there is a power failure during a "saveenv" operation.
+ Also this config changes the binary environment structure handling
+ which is used by env import/export commands which are independent of
+ storing variables to redundant location on a non volatile device.
config ENV_FAT_INTERFACE
string "Name of the block device for the environment"
diff --git a/include/configs/stm32mp1.h b/include/configs/stm32mp1.h
index 1aa7514..863b652 100644
--- a/include/configs/stm32mp1.h
+++ b/include/configs/stm32mp1.h
@@ -69,7 +69,6 @@
/* Ethernet need */
#ifdef CONFIG_DWC_ETH_QOS
-#define CONFIG_SYS_NONCACHED_MEMORY (1 * SZ_1M) /* 1M */
#define CONFIG_SERVERIP 192.168.1.1
#define CONFIG_BOOTP_SERVERIP
#define CONFIG_SYS_AUTOLOAD "no"
diff --git a/lib/uuid.c b/lib/uuid.c
index 54a93aa..5bc6867 100644
--- a/lib/uuid.c
+++ b/lib/uuid.c
@@ -15,6 +15,8 @@
#include <asm/io.h>
#include <part_efi.h>
#include <malloc.h>
+#include <dm/uclass.h>
+#include <rng.h>
/*
* UUID - Universally Unique IDentifier - 128 bits unique number.
@@ -249,9 +251,22 @@
{
u32 ptr[4];
struct uuid *uuid = (struct uuid *)ptr;
- int i;
+ int i, ret;
+ struct udevice *devp;
+ u32 randv = 0;
- srand(get_ticks() + rand());
+ if (IS_ENABLED(CONFIG_DM_RNG)) {
+ ret = uclass_get_device(UCLASS_RNG, 0, &devp);
+ if (ret) {
+ ret = dm_rng_read(devp, &randv, sizeof(randv));
+ if (ret < 0)
+ randv = 0;
+ }
+ }
+ if (randv)
+ srand(randv);
+ else
+ srand(get_ticks() + rand());
/* Set all fields randomly */
for (i = 0; i < 4; i++)
diff --git a/net/eth-uclass.c b/net/eth-uclass.c
index 0156324..7c2454f 100644
--- a/net/eth-uclass.c
+++ b/net/eth-uclass.c
@@ -26,6 +26,7 @@
*/
struct eth_device_priv {
enum eth_state_t state;
+ bool running;
};
/**
@@ -290,6 +291,7 @@
dev_get_uclass_priv(current);
priv->state = ETH_STATE_ACTIVE;
+ priv->running = true;
return 0;
}
} else {
@@ -319,13 +321,16 @@
struct eth_device_priv *priv;
current = eth_get_dev();
- if (!current || !eth_is_active(current))
+ if (!current)
return;
- eth_get_ops(current)->stop(current);
priv = dev_get_uclass_priv(current);
- if (priv)
- priv->state = ETH_STATE_PASSIVE;
+ if (!priv || !priv->running)
+ return;
+
+ eth_get_ops(current)->stop(current);
+ priv->state = ETH_STATE_PASSIVE;
+ priv->running = false;
}
int eth_is_active(struct udevice *dev)
@@ -534,6 +539,7 @@
#endif
priv->state = ETH_STATE_INIT;
+ priv->running = false;
/* Check if the device has a valid MAC address in device tree */
if (!eth_dev_get_mac_address(dev, pdata->enetaddr) ||
diff --git a/net/eth_legacy.c b/net/eth_legacy.c
index 6e0c058..6870afb 100644
--- a/net/eth_legacy.c
+++ b/net/eth_legacy.c
@@ -365,7 +365,7 @@
ret = eth_current->send(eth_current, packet, length);
#if defined(CONFIG_CMD_PCAP)
if (ret >= 0)
- pcap_post(packet, lengeth, true);
+ pcap_post(packet, length, true);
#endif
return ret;
}
diff --git a/net/net_rand.h b/net/net_rand.h
index 4bf9bd8..6a52cda 100644
--- a/net/net_rand.h
+++ b/net/net_rand.h
@@ -10,6 +10,8 @@
#define __NET_RAND_H__
#include <common.h>
+#include <dm/uclass.h>
+#include <rng.h>
/*
* Return a seed for the PRNG derived from the eth0 MAC address.
@@ -37,7 +39,22 @@
*/
static inline void srand_mac(void)
{
- srand(seed_mac());
+ int ret;
+ struct udevice *devp;
+ u32 randv = 0;
+
+ if (IS_ENABLED(CONFIG_DM_RNG)) {
+ ret = uclass_get_device(UCLASS_RNG, 0, &devp);
+ if (ret) {
+ ret = dm_rng_read(devp, &randv, sizeof(randv));
+ if (ret < 0)
+ randv = 0;
+ }
+ }
+ if (randv)
+ srand(randv);
+ else
+ srand(seed_mac());
}
#endif /* __NET_RAND_H__ */
diff --git a/net/ping.c b/net/ping.c
index 0e33660..075df36 100644
--- a/net/ping.c
+++ b/net/ping.c
@@ -90,6 +90,9 @@
net_set_state(NETLOOP_SUCCESS);
return;
case ICMP_ECHO_REQUEST:
+ if (net_ip.s_addr == 0)
+ return;
+
eth_hdr_size = net_update_ether(et, et->et_src, PROT_IP);
debug_cond(DEBUG_DEV_PKT,
diff --git a/net/tftp.c b/net/tftp.c
index 2cfa0b1..03079de 100644
--- a/net/tftp.c
+++ b/net/tftp.c
@@ -630,8 +630,10 @@
tftp_cur_block++;
tftp_cur_block %= TFTP_SEQUENCE_SIZE;
- if (tftp_state == STATE_SEND_RRQ)
+ if (tftp_state == STATE_SEND_RRQ) {
debug("Server did not acknowledge any options!\n");
+ tftp_next_ack = tftp_windowsize;
+ }
if (tftp_state == STATE_SEND_RRQ || tftp_state == STATE_OACK ||
tftp_state == STATE_RECV_WRQ) {