commit beeda8c9d26abfc53ac721cab6686853d7778b87
author Chander Kashyap <chander.kashyap@linaro.org> Thu May 26 01:10:34 2011 +0000
committer Albert ARIBAUD <albert.u.boot@aribaud.net> Wed Jun 01 19:41:32 2011 +0200
tree ba7871d5ebd3052d871da157af93d88321d12eb5
parent 25a33623f23827122fe98ec957a9574d00f111ea

SMDKV310: CPU fequency and mmc_pre_ratio modified

Modifies CPU Frequency to 1GHz and removes hard coding of mmc_pre_ratio for
MMC Channel2 in FSYS2 register.

Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
Acked-by: Minkyu Kang <mk7.kang@samsung.com>

board/samsung/smdkv310/lowlevel_init.S

diff --git a/board/samsung/smdkv310/lowlevel_init.S b/board/samsung/smdkv310/lowlevel_init.S
index 359cff4..04f6579 100644
--- a/board/samsung/smdkv310/lowlevel_init.S
+++ b/board/samsung/smdkv310/lowlevel_init.S
@@ -170,7 +170,7 @@
 	 * COREM1_RATIO[8]	0x7
 	 * COREM0_RATIO[4]	0x3
 	 */
-	ldr	r1, =0x01133730
+	ldr	r1, =0x0133730
 	ldr	r2, =0x14500			@CLK_DIV_CPU0_OFFSET
 	str	r1, [r0, r2]
 
@@ -245,7 +245,7 @@
 	str	r1, [r0, r2]
 
 	/* MMC[2:3] */
-	ldr	r1, =0x000f020f			/* 800(MPLL) / (15 + 1) */
+	ldr	r1, =0x000f000f			/* 800(MPLL) / (15 + 1) */
 	ldr	r2, =0x0C548			@ CLK_DIV_FSYS2
 	str	r1, [r0, r2]