Change initdram() return type to phys_size_t
This patch changes the return type of initdram() from long int to phys_size_t.
This is required for a couple of reasons: long int limits the amount of dram
to 2GB, and u-boot in general is moving over to phys_size_t to represent the
size of physical memory. phys_size_t is defined as an unsigned long on almost
all current platforms.
This patch *only* changes the return type of the initdram function (in
include/common.h, as well as in each board's implementation of initdram). It
does not actually modify the code inside the function on any of the platforms;
platforms which wish to support more than 2GB of DRAM will need to modify
their initdram() function code.
Build tested with MAKEALL for ppc, arm, mips, mips-el. Booted on powerpc
MPC8641HPCN.
Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
diff --git a/board/amcc/acadia/memory.c b/board/amcc/acadia/memory.c
index 3dec315..48a6725 100644
--- a/board/amcc/acadia/memory.c
+++ b/board/amcc/acadia/memory.c
@@ -59,7 +59,7 @@
}
#endif
-long int initdram(int board_type)
+phys_size_t initdram(int board_type)
{
#if defined(CONFIG_NAND_SPL)
u32 reg;
diff --git a/board/amcc/bamboo/bamboo.c b/board/amcc/bamboo/bamboo.c
index 0c7d69e..f415701 100644
--- a/board/amcc/bamboo/bamboo.c
+++ b/board/amcc/bamboo/bamboo.c
@@ -453,7 +453,7 @@
}
-long int initdram (int board_type)
+phys_size_t initdram (int board_type)
{
#if !(defined(CONFIG_NAND_U_BOOT) || defined(CONFIG_NAND_SPL))
long dram_size;
diff --git a/board/amcc/bubinga/bubinga.c b/board/amcc/bubinga/bubinga.c
index 9d508b8..74a2a1c 100644
--- a/board/amcc/bubinga/bubinga.c
+++ b/board/amcc/bubinga/bubinga.c
@@ -70,7 +70,7 @@
initdram(int board_type) reads EEPROM via I2c. EEPROM contains all of
the necessary info for SDRAM controller configuration
------------------------------------------------------------------------- */
-long int initdram(int board_type)
+phys_size_t initdram(int board_type)
{
long int ret;
diff --git a/board/amcc/canyonlands/canyonlands.c b/board/amcc/canyonlands/canyonlands.c
index 4e3b349..e0e0211 100644
--- a/board/amcc/canyonlands/canyonlands.c
+++ b/board/amcc/canyonlands/canyonlands.c
@@ -205,7 +205,7 @@
* I2C SPD DIMM autodetection/calibration doesn't fit into the 4k of boot
* code.
*/
-long int initdram(int board_type)
+phys_size_t initdram(int board_type)
{
return CFG_MBYTES_SDRAM << 20;
}
diff --git a/board/amcc/ebony/ebony.c b/board/amcc/ebony/ebony.c
index c6375ac..9bcdf59 100644
--- a/board/amcc/ebony/ebony.c
+++ b/board/amcc/ebony/ebony.c
@@ -104,7 +104,7 @@
return (0);
}
-long int initdram(int board_type)
+phys_size_t initdram(int board_type)
{
long dram_size = 0;
diff --git a/board/amcc/ocotea/ocotea.c b/board/amcc/ocotea/ocotea.c
index 79c1a1b..eea1e1e 100644
--- a/board/amcc/ocotea/ocotea.c
+++ b/board/amcc/ocotea/ocotea.c
@@ -201,7 +201,7 @@
}
-long int initdram (int board_type)
+phys_size_t initdram (int board_type)
{
long dram_size = 0;
diff --git a/board/amcc/sequoia/sdram.c b/board/amcc/sequoia/sdram.c
index b43ec48..77e6c7b 100644
--- a/board/amcc/sequoia/sdram.c
+++ b/board/amcc/sequoia/sdram.c
@@ -52,7 +52,7 @@
* initdram -- 440EPx's DDR controller is a DENALI Core
*
************************************************************************/
-long int initdram (int board_type)
+phys_size_t initdram (int board_type)
{
#if !defined(CONFIG_NAND_U_BOOT) || defined(CONFIG_NAND_SPL)
#if !defined(CONFIG_NAND_SPL)
diff --git a/board/amcc/taihu/taihu.c b/board/amcc/taihu/taihu.c
index e4fdf4a..254e3eb 100644
--- a/board/amcc/taihu/taihu.c
+++ b/board/amcc/taihu/taihu.c
@@ -78,10 +78,10 @@
}
/*************************************************************************
- * long int initdram
+ * phys_size_t initdram
*
************************************************************************/
-long int initdram(int board)
+phys_size_t initdram(int board)
{
return CFG_SDRAM_SIZE_PER_BANK * CFG_SDRAM_BANKS; /* 128Mbytes */
}
diff --git a/board/amcc/walnut/walnut.c b/board/amcc/walnut/walnut.c
index 641987e..28dcb66 100644
--- a/board/amcc/walnut/walnut.c
+++ b/board/amcc/walnut/walnut.c
@@ -89,7 +89,7 @@
* initdram(int board_type) reads EEPROM via I2c. EEPROM contains all of
* the necessary info for SDRAM controller configuration
*/
-long int initdram(int board_type)
+phys_size_t initdram(int board_type)
{
return spd_sdram();
}
diff --git a/board/amcc/yosemite/yosemite.c b/board/amcc/yosemite/yosemite.c
index 8345537..3b1f8e2 100644
--- a/board/amcc/yosemite/yosemite.c
+++ b/board/amcc/yosemite/yosemite.c
@@ -281,7 +281,7 @@
*tr1_value = (first_good + last_bad) / 2;
}
-long int initdram(int board)
+phys_size_t initdram(int board)
{
register uint reg;
int tr1_bank1, tr1_bank2;