powerpc/8xxx: Add support for interactive DDR programming interface
Interactive DDR debugging provides a user interface to view and modify SPD,
DIMM parameters, board options and DDR controller registers before DDR is
initialized. With this feature, developers can fine-tune DDR for board
bringup and other debugging without frequently having to reprogram the flash.
To enable this feature, define CONFIG_FSL_DDR_INTERACTIVE in board header
file and set an environment variable to activate it. Syntax:
setenv ddr_interactive on
After reset, U-boot prompts before initializing DDR controllers
FSL DDR>
The available commands are
print print SPD and intermediate computed data
reset reboot machine
recompute reload SPD and options to default and recompute regs
edit modify spd, parameter, or option
compute recompute registers from current next_step to end
next_step shows current next_step
help this message
go program the memory controller and continue with u-boot
The first command should be "compute", which reads data from DIMM SPDs and
board options, performs the calculation then stops before setting DDR
controller. A user can use "print" and "edit" commands to view and modify
anything. "Go" picks up from current step with any modification and
compltes the calculation then enables the DDR controller to continue u-boot.
"Recompute" does it over from fresh reading.
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
diff --git a/arch/powerpc/cpu/mpc8xxx/ddr/main.c b/arch/powerpc/cpu/mpc8xxx/ddr/main.c
index 5699b0c..f52ad9f 100644
--- a/arch/powerpc/cpu/mpc8xxx/ddr/main.c
+++ b/arch/powerpc/cpu/mpc8xxx/ddr/main.c
@@ -135,7 +135,6 @@
* | interleaving
*/
-#ifdef DEBUG
const char *step_string_tbl[] = {
"STEP_GET_SPD",
"STEP_COMPUTE_DIMM_PARMS",
@@ -156,7 +155,6 @@
return step_string_tbl[s];
}
-#endif
int step_assign_addresses(fsl_ddr_info_t *pinfo,
unsigned int dbw_cap_adj[],
@@ -499,7 +497,12 @@
memset(&info, 0, sizeof(fsl_ddr_info_t));
/* Compute it once normally. */
- total_memory = fsl_ddr_compute(&info, STEP_GET_SPD, 0);
+#ifdef CONFIG_FSL_DDR_INTERACTIVE
+ if (getenv("ddr_interactive"))
+ total_memory = fsl_ddr_interactive(&info);
+ else
+#endif
+ total_memory = fsl_ddr_compute(&info, STEP_GET_SPD, 0);
/* Check for memory controller interleaving. */
memctl_interleaved = 0;