Merge tag 'u-boot-stm32-20220617' of https://source.denx.de/u-boot/custodians/u-boot-stm
- Fix the stm32prog command for stm32mp platform
- Add stm32mp15x DHCOR based DRC Compact board
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 0a2713c..8a31421 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1172,7 +1172,8 @@
stm32mp15xx-dhcom-drc02.dtb \
stm32mp15xx-dhcom-pdk2.dtb \
stm32mp15xx-dhcom-picoitx.dtb \
- stm32mp15xx-dhcor-avenger96.dtb
+ stm32mp15xx-dhcor-avenger96.dtb \
+ stm32mp15xx-dhcor-drc-compact.dtb
dtb-$(CONFIG_SOC_K3_AM6) += \
k3-am654-base-board.dtb \
diff --git a/arch/arm/dts/stm32mp15-pinctrl.dtsi b/arch/arm/dts/stm32mp15-pinctrl.dtsi
index f0d66d8..b92a149 100644
--- a/arch/arm/dts/stm32mp15-pinctrl.dtsi
+++ b/arch/arm/dts/stm32mp15-pinctrl.dtsi
@@ -929,6 +929,26 @@
};
};
+ m_can1_pins_c: m-can1-2 {
+ pins1 {
+ pinmux = <STM32_PINMUX('H', 13, AF9)>; /* CAN1_TX */
+ slew-rate = <1>;
+ drive-push-pull;
+ bias-disable;
+ };
+ pins2 {
+ pinmux = <STM32_PINMUX('H', 14, AF9)>; /* CAN1_RX */
+ bias-disable;
+ };
+ };
+
+ m_can1_sleep_pins_c: m_can1-sleep-2 {
+ pins {
+ pinmux = <STM32_PINMUX('H', 13, ANALOG)>, /* CAN1_TX */
+ <STM32_PINMUX('H', 14, ANALOG)>; /* CAN1_RX */
+ };
+ };
+
m_can2_pins_a: m-can2-0 {
pins1 {
pinmux = <STM32_PINMUX('B', 13, AF9)>; /* CAN2_TX */
@@ -1758,6 +1778,21 @@
};
};
+ spi2_pins_b: spi2-1 {
+ pins1 {
+ pinmux = <STM32_PINMUX('I', 1, AF5)>, /* SPI1_SCK */
+ <STM32_PINMUX('I', 3, AF5)>; /* SPI1_MOSI */
+ bias-disable;
+ drive-push-pull;
+ slew-rate = <1>;
+ };
+
+ pins2 {
+ pinmux = <STM32_PINMUX('I', 2, AF5)>; /* SPI1_MISO */
+ bias-disable;
+ };
+ };
+
spi4_pins_a: spi4-0 {
pins {
pinmux = <STM32_PINMUX('E', 12, AF5)>, /* SPI4_SCK */
@@ -1835,6 +1870,49 @@
};
};
+ uart4_pins_d: uart4-3 {
+ pins1 {
+ pinmux = <STM32_PINMUX('A', 13, AF8)>; /* UART4_TX */
+ bias-disable;
+ drive-push-pull;
+ slew-rate = <0>;
+ };
+ pins2 {
+ pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
+ bias-disable;
+ };
+ };
+
+ uart4_idle_pins_d: uart4-idle-3 {
+ pins1 {
+ pinmux = <STM32_PINMUX('A', 13, ANALOG)>; /* UART4_TX */
+ };
+ pins2 {
+ pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
+ bias-disable;
+ };
+ };
+
+ uart4_sleep_pins_d: uart4-sleep-3 {
+ pins {
+ pinmux = <STM32_PINMUX('A', 13, ANALOG)>, /* UART4_TX */
+ <STM32_PINMUX('B', 2, ANALOG)>; /* UART4_RX */
+ };
+ };
+
+ uart5_pins_a: uart5-0 {
+ pins1 {
+ pinmux = <STM32_PINMUX('B', 13, AF14)>; /* UART5_TX */
+ bias-disable;
+ drive-push-pull;
+ slew-rate = <0>;
+ };
+ pins2 {
+ pinmux = <STM32_PINMUX('B', 5, AF12)>; /* UART5_RX */
+ bias-disable;
+ };
+ };
+
uart7_pins_a: uart7-0 {
pins1 {
pinmux = <STM32_PINMUX('E', 8, AF7)>; /* UART7_TX */
@@ -2134,6 +2212,47 @@
};
};
+ usart3_pins_e: usart3-4 {
+ pins1 {
+ pinmux = <STM32_PINMUX('B', 10, AF7)>, /* USART3_TX */
+ <STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */
+ bias-disable;
+ drive-push-pull;
+ slew-rate = <0>;
+ };
+ pins2 {
+ pinmux = <STM32_PINMUX('B', 11, AF7)>, /* USART3_RX */
+ <STM32_PINMUX('D', 11, AF7)>; /* USART3_CTS_NSS */
+ bias-pull-up;
+ };
+ };
+
+ usart3_idle_pins_e: usart3-idle-4 {
+ pins1 {
+ pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */
+ <STM32_PINMUX('D', 11, ANALOG)>; /* USART3_CTS_NSS */
+ };
+ pins2 {
+ pinmux = <STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */
+ bias-disable;
+ drive-push-pull;
+ slew-rate = <0>;
+ };
+ pins3 {
+ pinmux = <STM32_PINMUX('B', 11, AF7)>; /* USART3_RX */
+ bias-pull-up;
+ };
+ };
+
+ usart3_sleep_pins_e: usart3-sleep-4 {
+ pins {
+ pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */
+ <STM32_PINMUX('G', 8, ANALOG)>, /* USART3_RTS */
+ <STM32_PINMUX('D', 11, ANALOG)>, /* USART3_CTS_NSS */
+ <STM32_PINMUX('B', 11, ANALOG)>; /* USART3_RX */
+ };
+ };
+
usbotg_hs_pins_a: usbotg-hs-0 {
pins {
pinmux = <STM32_PINMUX('A', 10, ANALOG)>; /* OTG_ID */
diff --git a/arch/arm/dts/stm32mp153c-dhcor-drc-compact.dts b/arch/arm/dts/stm32mp153c-dhcor-drc-compact.dts
new file mode 100644
index 0000000..c8b9818
--- /dev/null
+++ b/arch/arm/dts/stm32mp153c-dhcor-drc-compact.dts
@@ -0,0 +1,30 @@
+// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
+/*
+ * Copyright (C) 2022 Marek Vasut <marex@denx.de>
+ *
+ * DHCOR STM32MP1 variant:
+ * DHCR-STM32MP153C-C065-R051-V33-SPI-I-01LG
+ * DHCOR PCB number: 586-100 or newer
+ * DRC Compact PCB number: 627-100 or newer
+ */
+
+/dts-v1/;
+
+#include "stm32mp153.dtsi"
+#include "stm32mp15xc.dtsi"
+#include "stm32mp15xx-dhcor-som.dtsi"
+#include "stm32mp15xx-dhcor-drc-compact.dtsi"
+
+/ {
+ model = "DH electronics STM32MP153C DHCOR DRC Compact";
+ compatible = "dh,stm32mp153c-dhcor-drc-compact",
+ "dh,stm32mp153c-dhcor-som",
+ "st,stm32mp153";
+};
+
+&m_can1 {
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&m_can1_pins_c>;
+ pinctrl-1 = <&m_can1_sleep_pins_c>;
+ status = "okay";
+};
diff --git a/arch/arm/dts/stm32mp15xx-dhcor-drc-compact-u-boot.dtsi b/arch/arm/dts/stm32mp15xx-dhcor-drc-compact-u-boot.dtsi
new file mode 100644
index 0000000..407fed5
--- /dev/null
+++ b/arch/arm/dts/stm32mp15xx-dhcor-drc-compact-u-boot.dtsi
@@ -0,0 +1,120 @@
+// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
+/*
+ * Copyright (C) 2022 Marek Vasut <marex@denx.de>
+ */
+
+#include "stm32mp15xx-dhcor-u-boot.dtsi"
+
+/delete-node/ &ksz8851;
+
+/ {
+ aliases {
+ mmc0 = &sdmmc1;
+ mmc1 = &sdmmc2;
+ usb0 = &usbotg_hs;
+ ethernet1 = &ks8851;
+ };
+
+ config {
+ dh,board-coding-gpios = <&gpioh 9 0>, <&gpioh 8 0>, <&gpioh 3 0>;
+ };
+
+ /* This is actually on FMC2, but we do not have bus driver for that */
+ ks8851: ks8851mll@64000000 {
+ compatible = "micrel,ks8851-mll";
+ reg = <0x64000000 0x20000>;
+ };
+};
+
+ðernet0 {
+ phy-reset-gpios = <&gpioz 2 GPIO_ACTIVE_LOW>;
+
+ mdio0 {
+ ethernet-phy@7 {
+ reset-gpios = <&gpioz 2 GPIO_ACTIVE_LOW>;
+ reset-assert-us = <11000>;
+ reset-deassert-us = <1000>;
+ };
+ };
+};
+
+&pinctrl {
+ /* These should bound to FMC2 bus driver, but we do not have one */
+ pinctrl-0 = <&fmc_pins_b>;
+ pinctrl-1 = <&fmc_sleep_pins_b>;
+ pinctrl-names = "default", "sleep";
+};
+
+&sdmmc1 {
+ u-boot,dm-spl;
+ st,use-ckin;
+ st,cmd-gpios = <&gpiod 2 0>;
+ st,ck-gpios = <&gpioc 12 0>;
+ st,ckin-gpios = <&gpioe 4 0>;
+};
+
+&sdmmc1_b4_pins_a {
+ u-boot,dm-spl;
+ pins1 {
+ u-boot,dm-spl;
+ };
+ pins2 {
+ u-boot,dm-spl;
+ };
+};
+
+&sdmmc1_dir_pins_b {
+ u-boot,dm-spl;
+ pins1 {
+ u-boot,dm-spl;
+ };
+ pins2 {
+ u-boot,dm-spl;
+ };
+};
+
+&sdmmc2 {
+ u-boot,dm-spl;
+};
+
+&sdmmc2_b4_pins_a {
+ u-boot,dm-spl;
+ pins1 {
+ u-boot,dm-spl;
+ };
+ pins2 {
+ u-boot,dm-spl;
+ };
+};
+
+&sdmmc2_d47_pins_c {
+ u-boot,dm-spl;
+ pins {
+ u-boot,dm-spl;
+ };
+};
+
+&sdmmc3 { /* SDIO Wi-Fi */
+ status = "disabled";
+};
+
+&uart4 {
+ u-boot,dm-pre-reloc;
+};
+
+&uart4_pins_d {
+ u-boot,dm-pre-reloc;
+ pins1 {
+ u-boot,dm-pre-reloc;
+ };
+ pins2 {
+ u-boot,dm-pre-reloc;
+ /delete-property/ bias-disable;
+ bias-pull-up;
+ };
+};
+
+&usbotg_hs {
+ u-boot,force-b-session-valid;
+ hnp-srp-disable;
+};
diff --git a/arch/arm/dts/stm32mp15xx-dhcor-drc-compact.dts b/arch/arm/dts/stm32mp15xx-dhcor-drc-compact.dts
new file mode 100644
index 0000000..77dd944
--- /dev/null
+++ b/arch/arm/dts/stm32mp15xx-dhcor-drc-compact.dts
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
+/*
+ * Copyright (C) 2022 Marek Vasut <marex@denx.de>
+ */
+
+/dts-v1/;
+
+#include "stm32mp151.dtsi"
+#include "stm32mp15xc.dtsi"
+#include "stm32mp15xx-dhcor-som.dtsi"
+#include "stm32mp15xx-dhcor-drc-compact.dtsi"
+
+/ {
+ model = "DH electronics STM32MP15xx DHCOR DRC Compact";
+ compatible = "dh,stm32mp15xx-dhcor-drc-compact", "st,stm32mp1xx";
+};
diff --git a/arch/arm/dts/stm32mp15xx-dhcor-drc-compact.dtsi b/arch/arm/dts/stm32mp15xx-dhcor-drc-compact.dtsi
new file mode 100644
index 0000000..bedccf0
--- /dev/null
+++ b/arch/arm/dts/stm32mp15xx-dhcor-drc-compact.dtsi
@@ -0,0 +1,326 @@
+// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
+/*
+ * Copyright (C) 2022 Marek Vasut <marex@denx.de>
+ */
+
+/ {
+ aliases {
+ ethernet0 = ðernet0;
+ ethernet1 = &ksz8851;
+ mmc0 = &sdmmc1;
+ rtc0 = &hwrtc;
+ rtc1 = &rtc;
+ serial0 = &uart4;
+ serial1 = &uart8;
+ serial2 = &usart3;
+ serial3 = &uart5;
+ spi0 = &qspi;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ led {
+ compatible = "gpio-leds";
+ led1 {
+ label = "yellow:user0";
+ gpios = <&gpioz 6 GPIO_ACTIVE_LOW>;
+ default-state = "off";
+ };
+
+ led2 {
+ label = "red:user1";
+ gpios = <&gpioz 3 GPIO_ACTIVE_LOW>;
+ default-state = "off";
+ };
+ };
+
+ ethernet_vio: vioregulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vio";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ gpio = <&gpioh 2 GPIO_ACTIVE_LOW>;
+ regulator-always-on;
+ regulator-boot-on;
+ vin-supply = <&vdd>;
+ };
+};
+
+&adc { /* X11 ADC inputs */
+ pinctrl-names = "default";
+ pinctrl-0 = <&adc12_ain_pins_b>;
+ vdd-supply = <&vdd>;
+ vdda-supply = <&vdda>;
+ vref-supply = <&vdda>;
+ status = "okay";
+
+ adc1: adc@0 {
+ st,adc-channels = <0 1 6>;
+ st,min-sample-time-nsecs = <5000>;
+ status = "okay";
+ };
+
+ adc2: adc@100 {
+ st,adc-channels = <0 1 2>;
+ st,min-sample-time-nsecs = <5000>;
+ status = "okay";
+ };
+};
+
+ðernet0 {
+ status = "okay";
+ pinctrl-0 = <ðernet0_rgmii_pins_c>;
+ pinctrl-1 = <ðernet0_rgmii_sleep_pins_c>;
+ pinctrl-names = "default", "sleep";
+ phy-mode = "rgmii";
+ max-speed = <1000>;
+ phy-handle = <&phy0>;
+
+ mdio0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "snps,dwmac-mdio";
+ reset-gpios = <&gpioz 2 GPIO_ACTIVE_LOW>;
+ reset-delay-us = <1000>;
+ reset-post-delay-us = <1000>;
+
+ phy0: ethernet-phy@7 {
+ reg = <7>;
+
+ rxc-skew-ps = <1500>;
+ rxdv-skew-ps = <540>;
+ rxd0-skew-ps = <420>;
+ rxd1-skew-ps = <420>;
+ rxd2-skew-ps = <420>;
+ rxd3-skew-ps = <420>;
+
+ txc-skew-ps = <1440>;
+ txen-skew-ps = <540>;
+ txd0-skew-ps = <420>;
+ txd1-skew-ps = <420>;
+ txd2-skew-ps = <420>;
+ txd3-skew-ps = <420>;
+ };
+ };
+};
+
+&fmc {
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&fmc_pins_b>;
+ pinctrl-1 = <&fmc_sleep_pins_b>;
+ status = "okay";
+
+ ksz8851: ethernet@1,0 {
+ compatible = "micrel,ks8851-mll";
+ reg = <1 0x0 0x2>, <1 0x2 0x20000>;
+ interrupt-parent = <&gpioc>;
+ interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
+ bank-width = <2>;
+
+ /* Timing values are in nS */
+ st,fmc2-ebi-cs-mux-enable;
+ st,fmc2-ebi-cs-transaction-type = <4>;
+ st,fmc2-ebi-cs-buswidth = <16>;
+ st,fmc2-ebi-cs-address-setup-ns = <5>;
+ st,fmc2-ebi-cs-address-hold-ns = <5>;
+ st,fmc2-ebi-cs-bus-turnaround-ns = <5>;
+ st,fmc2-ebi-cs-data-setup-ns = <45>;
+ st,fmc2-ebi-cs-data-hold-ns = <1>;
+ st,fmc2-ebi-cs-write-address-setup-ns = <5>;
+ st,fmc2-ebi-cs-write-address-hold-ns = <5>;
+ st,fmc2-ebi-cs-write-bus-turnaround-ns = <5>;
+ st,fmc2-ebi-cs-write-data-setup-ns = <45>;
+ st,fmc2-ebi-cs-write-data-hold-ns = <1>;
+ };
+};
+
+&gpioa {
+ gpio-line-names = "", "", "", "",
+ "DRCC-VAR2", "", "", "",
+ "", "", "", "",
+ "", "", "", "";
+};
+
+&gpioe {
+ gpio-line-names = "", "", "", "",
+ "", "DRCC-GPIO0", "", "",
+ "", "", "", "",
+ "", "", "", "";
+};
+
+&gpiog {
+ gpio-line-names = "", "", "", "",
+ "", "", "", "",
+ "", "", "", "",
+ "DRCC-GPIO5", "", "", "";
+};
+
+&gpioh {
+ gpio-line-names = "", "", "", "DRCC-HW2",
+ "DRCC-GPIO4", "", "", "",
+ "DRCC-HW1", "DRCC-HW0", "", "DRCC-VAR1",
+ "DRCC-VAR0", "", "", "DRCC-GPIO6";
+};
+
+&gpioi {
+ gpio-line-names = "", "", "", "",
+ "", "", "", "DRCC-GPIO2",
+ "", "DRCC-GPIO1", "", "",
+ "", "", "", "";
+};
+
+&i2c1 { /* X11 I2C1 */
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c1_pins_b>;
+ i2c-scl-rising-time-ns = <185>;
+ i2c-scl-falling-time-ns = <20>;
+ status = "okay";
+ /delete-property/dmas;
+ /delete-property/dma-names;
+};
+
+&i2c4 {
+ hwrtc: rtc@32 {
+ compatible = "microcrystal,rv8803";
+ reg = <0x32>;
+ };
+
+ eeprom@50 {
+ compatible = "atmel,24c04";
+ reg = <0x50>;
+ pagesize = <16>;
+ };
+};
+
+&sdmmc1 { /* MicroSD */
+ pinctrl-names = "default", "opendrain", "sleep";
+ pinctrl-0 = <&sdmmc1_b4_pins_a>;
+ pinctrl-1 = <&sdmmc1_b4_od_pins_a>;
+ pinctrl-2 = <&sdmmc1_b4_sleep_pins_a>;
+ cd-gpios = <&gpioi 8 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
+ disable-wp;
+ st,neg-edge;
+ bus-width = <4>;
+ vmmc-supply = <&vdd>;
+ vqmmc-supply = <&vdd>;
+ status = "okay";
+};
+
+&sdmmc2 { /* eMMC */
+ pinctrl-names = "default", "opendrain", "sleep";
+ pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_c>;
+ pinctrl-1 = <&sdmmc2_b4_od_pins_a &sdmmc2_d47_pins_c>;
+ pinctrl-2 = <&sdmmc2_b4_sleep_pins_a &sdmmc2_d47_sleep_pins_c>;
+ bus-width = <8>;
+ no-sd;
+ no-sdio;
+ non-removable;
+ st,neg-edge;
+ vmmc-supply = <&v3v3>;
+ vqmmc-supply = <&vdd>;
+ status = "okay";
+};
+
+&sdmmc3 { /* SDIO Wi-Fi */
+ pinctrl-names = "default", "opendrain", "sleep";
+ pinctrl-0 = <&sdmmc3_b4_pins_a>;
+ pinctrl-1 = <&sdmmc3_b4_od_pins_a>;
+ pinctrl-2 = <&sdmmc3_b4_sleep_pins_a>;
+ broken-cd;
+ bus-width = <4>;
+ mmc-ddr-3_3v;
+ st,neg-edge;
+ vmmc-supply = <&v3v3>;
+ vqmmc-supply = <&v3v3>;
+ status = "okay";
+};
+
+&spi2 { /* X11 SPI */
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi2_pins_b>;
+ cs-gpios = <&gpioi 0 0>;
+ status = "disabled";
+ /delete-property/dmas;
+ /delete-property/dma-names;
+};
+
+&uart4 {
+ label = "UART0";
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart4_pins_d>;
+ /delete-property/dmas;
+ /delete-property/dma-names;
+ status = "okay";
+};
+
+&uart5 { /* X11 UART */
+ label = "X11-UART5";
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart5_pins_a>;
+ /delete-property/dmas;
+ /delete-property/dma-names;
+ status = "okay";
+};
+
+&uart8 {
+ label = "RS485-1";
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart8_pins_a &uart8_rtscts_pins_a>;
+ uart-has-rtscts;
+ /delete-property/dmas;
+ /delete-property/dma-names;
+ status = "okay";
+};
+
+&usart3 { /* RS485 or RS232 */
+ label = "RS485-2";
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&usart3_pins_e>;
+ pinctrl-1 = <&usart3_sleep_pins_e>;
+ uart-has-rtscts;
+ /delete-property/dmas;
+ /delete-property/dma-names;
+ status = "okay";
+};
+
+&usbh_ehci {
+ phys = <&usbphyc_port0>;
+ status = "okay";
+};
+
+&usbh_ohci {
+ phys = <&usbphyc_port0>;
+ status = "okay";
+};
+
+&usbotg_hs {
+ dr_mode = "otg";
+ pinctrl-0 = <&usbotg_hs_pins_a>;
+ pinctrl-names = "default";
+ phy-names = "usb2-phy";
+ phys = <&usbphyc_port1 0>;
+ vbus-supply = <&vbus_otg>;
+ status = "okay";
+};
+
+&usbphyc {
+ status = "okay";
+};
+
+&usbphyc_port0 {
+ phy-supply = <&vdd_usb>;
+ vdda1v1-supply = <®11>;
+ vdda1v8-supply = <®18>;
+ connector {
+ compatible = "usb-a-connector";
+ vbus-supply = <&vbus_sw>;
+ };
+};
+
+&usbphyc_port1 {
+ phy-supply = <&vdd_usb>;
+ vdda1v1-supply = <®11>;
+ vdda1v8-supply = <®18>;
+};
diff --git a/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.c b/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.c
index b711112..c391b6c 100644
--- a/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.c
+++ b/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.c
@@ -1262,7 +1262,7 @@
"raw 0x%llx 0x%llx",
part->addr, nb_blk);
offset += snprintf(buf + offset, ALT_BUF_LEN - offset,
- " mmcpart %d;", -(part->part_id));
+ " mmcpart %d", -(part->part_id));
} else {
if (part->part_type == PART_SYSTEM &&
(part->target == STM32PROG_NAND ||
@@ -1280,7 +1280,7 @@
offset += snprintf(buf + offset, ALT_BUF_LEN - offset,
" %d", part->dev_id);
offset += snprintf(buf + offset, ALT_BUF_LEN - offset,
- " %d;", part->part_id);
+ " %d", part->part_id);
}
ret = -ENODEV;
switch (part->target) {
diff --git a/board/dhelectronics/dh_stm32mp1/u-boot-dhcor.its b/board/dhelectronics/dh_stm32mp1/u-boot-dhcor.its
index 0ea10a1..de7dcb3 100644
--- a/board/dhelectronics/dh_stm32mp1/u-boot-dhcor.its
+++ b/board/dhelectronics/dh_stm32mp1/u-boot-dhcor.its
@@ -23,6 +23,14 @@
arch = "arm";
compression = "none";
};
+
+ fdt-2 {
+ description = ".dtb";
+ data = /incbin/("arch/arm/dts/stm32mp15xx-dhcor-drc-compact.dtb");
+ type = "flat_dt";
+ arch = "arm";
+ compression = "none";
+ };
};
configurations {
@@ -35,6 +43,13 @@
fdt = "fdt-1";
};
+ config-2 {
+ /* DT+SoM+board model */
+ description = "dh,stm32mp15xx-dhcor-drc-compact_somrev0_boardrev0";
+ firmware = "uboot";
+ fdt = "fdt-2";
+ };
+
/* Add 586-200..586-400 with fdt-2..fdt-4 here */
};
};
diff --git a/configs/stm32mp15_dhcor_basic_defconfig b/configs/stm32mp15_dhcor_basic_defconfig
index 4e70566..66a09ef 100644
--- a/configs/stm32mp15_dhcor_basic_defconfig
+++ b/configs/stm32mp15_dhcor_basic_defconfig
@@ -108,6 +108,7 @@
CONFIG_PHY_MICREL_KSZ90X1=y
CONFIG_DM_ETH=y
CONFIG_DWC_ETH_QOS=y
+CONFIG_KS8851_MLL=y
CONFIG_PHY=y
CONFIG_SPL_PHY=y
CONFIG_PHY_STM32_USBPHYC=y