omap5/dra7: i2c: correct register offset for sync register

The register offset of i2c_sysc offset is not correct as per
omap5[1]/dra7[2] TRM, correct the offsets as per the
documentation.

[1] - http://www.ti.com/lit/pdf/swpu249
[2] - http://www.ti.com/lit/pdf/spruhz6

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
1 file changed