global: Move remaining CONFIG_SYS_SDRAM_* to CFG_SYS_SDRAM_*
The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_SDRAM
namespace do not easily transition to Kconfig. In many cases they likely
should come from the device tree instead. Move these out of CONFIG
namespace and in to CFG namespace.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
diff --git a/board/ti/am335x/board.c b/board/ti/am335x/board.c
index b97fedd..9e58281 100644
--- a/board/ti/am335x/board.c
+++ b/board/ti/am335x/board.c
@@ -704,7 +704,7 @@
hw_watchdog_init();
#endif
- gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+ gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x100;
#if defined(CONFIG_NOR) || defined(CONFIG_MTD_RAW_NAND)
gpmc_init();
#endif
diff --git a/board/ti/am43xx/board.c b/board/ti/am43xx/board.c
index 529129e..d0b7a14 100644
--- a/board/ti/am43xx/board.c
+++ b/board/ti/am43xx/board.c
@@ -639,7 +639,7 @@
u32 mreqprio_0, mreqprio_1, modena_init0_bw_fractional,
modena_init0_bw_integer, modena_init0_watermark_0;
- gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+ gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x100;
gpmc_init();
/*
diff --git a/board/ti/am57xx/board.c b/board/ti/am57xx/board.c
index cfc825e..652c40f 100644
--- a/board/ti/am57xx/board.c
+++ b/board/ti/am57xx/board.c
@@ -661,7 +661,7 @@
int board_init(void)
{
gpmc_init();
- gd->bd->bi_boot_params = (CONFIG_SYS_SDRAM_BASE + 0x100);
+ gd->bd->bi_boot_params = (CFG_SYS_SDRAM_BASE + 0x100);
return 0;
}
diff --git a/board/ti/am65x/evm.c b/board/ti/am65x/evm.c
index 34ec391..b266ccb 100644
--- a/board/ti/am65x/evm.c
+++ b/board/ti/am65x/evm.c
@@ -75,13 +75,13 @@
int dram_init_banksize(void)
{
/* Bank 0 declares the memory available in the DDR low region */
- gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
+ gd->bd->bi_dram[0].start = CFG_SYS_SDRAM_BASE;
gd->bd->bi_dram[0].size = 0x80000000;
gd->ram_size = 0x80000000;
#ifdef CONFIG_PHYS_64BIT
/* Bank 1 declares the memory available in the DDR high region */
- gd->bd->bi_dram[1].start = CONFIG_SYS_SDRAM_BASE1;
+ gd->bd->bi_dram[1].start = CFG_SYS_SDRAM_BASE1;
gd->bd->bi_dram[1].size = 0x80000000;
gd->ram_size = 0x100000000;
#endif
diff --git a/board/ti/dra7xx/evm.c b/board/ti/dra7xx/evm.c
index a854d61..1c00e25 100644
--- a/board/ti/dra7xx/evm.c
+++ b/board/ti/dra7xx/evm.c
@@ -644,7 +644,7 @@
ram_size = board_ti_get_emif_size();
- gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
+ gd->bd->bi_dram[0].start = CFG_SYS_SDRAM_BASE;
gd->bd->bi_dram[0].size = get_effective_memsize();
if (ram_size > CONFIG_MAX_MEM_MAPPED) {
gd->bd->bi_dram[1].start = 0x200000000;
diff --git a/board/ti/j721e/evm.c b/board/ti/j721e/evm.c
index d6e431e..d4e672a 100644
--- a/board/ti/j721e/evm.c
+++ b/board/ti/j721e/evm.c
@@ -71,13 +71,13 @@
int dram_init_banksize(void)
{
/* Bank 0 declares the memory available in the DDR low region */
- gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
+ gd->bd->bi_dram[0].start = CFG_SYS_SDRAM_BASE;
gd->bd->bi_dram[0].size = 0x80000000;
gd->ram_size = 0x80000000;
#ifdef CONFIG_PHYS_64BIT
/* Bank 1 declares the memory available in the DDR high region */
- gd->bd->bi_dram[1].start = CONFIG_SYS_SDRAM_BASE1;
+ gd->bd->bi_dram[1].start = CFG_SYS_SDRAM_BASE1;
gd->bd->bi_dram[1].size = 0x80000000;
gd->ram_size = 0x100000000;
#endif
diff --git a/board/ti/j721s2/evm.c b/board/ti/j721s2/evm.c
index e09adc8..4d28582 100644
--- a/board/ti/j721s2/evm.c
+++ b/board/ti/j721s2/evm.c
@@ -60,13 +60,13 @@
int dram_init_banksize(void)
{
/* Bank 0 declares the memory available in the DDR low region */
- gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
+ gd->bd->bi_dram[0].start = CFG_SYS_SDRAM_BASE;
gd->bd->bi_dram[0].size = 0x7fffffff;
gd->ram_size = 0x80000000;
#ifdef CONFIG_PHYS_64BIT
/* Bank 1 declares the memory available in the DDR high region */
- gd->bd->bi_dram[1].start = CONFIG_SYS_SDRAM_BASE1;
+ gd->bd->bi_dram[1].start = CFG_SYS_SDRAM_BASE1;
gd->bd->bi_dram[1].size = 0x37fffffff;
gd->ram_size = 0x400000000;
#endif
diff --git a/board/ti/ks2_evm/board.c b/board/ti/ks2_evm/board.c
index 51e8de4..34818736 100644
--- a/board/ti/ks2_evm/board.c
+++ b/board/ti/ks2_evm/board.c
@@ -46,7 +46,7 @@
ddr3_size = ddr3_init();
- gd->ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE,
+ gd->ram_size = get_ram_size((long *)CFG_SYS_SDRAM_BASE,
CONFIG_MAX_RAM_BANK_SIZE);
#if defined(CONFIG_TI_AEMIF)
if (!(board_is_k2g_ice() || board_is_k2g_i1()))
@@ -71,7 +71,7 @@
int board_init(void)
{
- gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+ gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x100;
return 0;
}
@@ -120,7 +120,7 @@
/* adjust memory start address for LPAE */
if (lpae) {
- start[0] -= CONFIG_SYS_SDRAM_BASE;
+ start[0] -= CFG_SYS_SDRAM_BASE;
start[0] += CONFIG_SYS_LPAE_SDRAM_BASE;
}
@@ -174,11 +174,11 @@
"linux,initrd-end", NULL);
if (prop1 && prop2) {
initrd_start = __be64_to_cpu(*prop1);
- initrd_start -= CONFIG_SYS_SDRAM_BASE;
+ initrd_start -= CFG_SYS_SDRAM_BASE;
initrd_start += CONFIG_SYS_LPAE_SDRAM_BASE;
initrd_start = __cpu_to_be64(initrd_start);
initrd_end = __be64_to_cpu(*prop2);
- initrd_end -= CONFIG_SYS_SDRAM_BASE;
+ initrd_end -= CFG_SYS_SDRAM_BASE;
initrd_end += CONFIG_SYS_LPAE_SDRAM_BASE;
initrd_end = __cpu_to_be64(initrd_end);
@@ -221,7 +221,7 @@
*reserve_start = __cpu_to_be64(*reserve_start);
size = __cpu_to_be64(*(reserve_start + 1));
if (size) {
- *reserve_start -= CONFIG_SYS_SDRAM_BASE;
+ *reserve_start -= CFG_SYS_SDRAM_BASE;
*reserve_start +=
CONFIG_SYS_LPAE_SDRAM_BASE;
*reserve_start =
diff --git a/board/ti/ti816x/evm.c b/board/ti/ti816x/evm.c
index 2d42af6..8c70835 100644
--- a/board/ti/ti816x/evm.c
+++ b/board/ti/ti816x/evm.c
@@ -27,7 +27,7 @@
int board_init(void)
{
- gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+ gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x100;
#if defined(CONFIG_MTD_RAW_NAND)
gpmc_init();
#endif