tree 7a1bda7894afa9187f50936172aff0529324d7b1
parent 7dda847bcf847be591e868fb065d23828c78387a
author York Sun <yorksun@freescale.com> 1294660980 +0000
committer Kumar Gala <galak@kernel.crashing.org> 1295499503 -0600

mpc85xx: Enable unique mode registers and dynamic ODT for DDR3

Added fsl_ddr_get_version() function to for DDR3 to poll DDRC IP version
(major, minor, errata) to determine if unique mode registers are available.
If true, always use unique mode registers. Dynamic ODT is enabled if needed.
The table is documented in doc/README.fsl-ddr. This function may also need
to be extend for future other platforms if such a feature exists.

Enable address parity and RCW by default for RDIMMs.

Change default output driver impedance from 34 ohm to 40ohm. Make it 34ohm for
quad-rank RDIMMs.

Use a formula to calculate rodt_on for timing_cfg_5.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>