Merge tag 'xilinx-for-v2024.01-rc1-v2' of https://source.denx.de/u-boot/custodians/u-boot-microblaze into next
Xilinx changes for v2024.01-rc1
clk:
- Dont return error when assigned-clocks is empty or missing
dm:
- Support reading a single indexed u64 value
- Add support for reading bootscript address/flash address from DT
cmd:
- Fix flash_is_unlocked API
fpga:
- Define fpga_load() for debug build
global:
- U-Boot project name cleanup (next2)
net:
- zynq_gem: Use generic_phy_valid() helper
- axienet: Convert to ofnode functions
- gmii2rgmii: Read bridge address from DT
pytest:
- skip tpm2_startup when env__tpm_device_test_skip=True
spi-nor:
- Add mx25u25635f support
- zynqmp_qspi: Tune cache behavior
trace:
- Fix flyrecord alignment issue
xilinx:
- Move scriptaddr to DT as bootscr-address
- Pick script_offset_f/script_size_f from DT as bootscr-flash-offset/size
- Do not generate distro boot variables if disabled
versal:
- Extend memory ranges to cover HBM
- Enable TPM, sha1sum and KASLRSEED
- Fix distroboot prioritization in connection to available devices
- Clean mini targets bootcommand
- Fix clock driver
versal-net:
- Enable TPM, sha1sum and KASLRSEED
- Fix distroboot prioritization in connection to available devices
zynqmp;
- Allow AES to run from SPL
- Enable CMD_KASLRSEED
- Add proper dependencies for USB and remove ZYNQMP_USB
- Fix user si570 default frequency for zcu* boards
- Cover SOM rev2 revision
- Various DT changes
- Add firmware and pinctrl support for tristate configuration
(high impedance/output enable)
- Add output-enable pins to SOMs
- Fix distroboot prioritization in connection to available devices
- Read bootscript address/flash address from DT
- Fix pcap_prog address
diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index 6771d8d..1c62c23 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -26,6 +26,7 @@
config TARGET_STARFIVE_VISIONFIVE2
bool "Support StarFive VisionFive2 Board"
+ select BOARD_LATE_INIT
config TARGET_TH1520_LPI4A
bool "Support Sipeed's TH1520 Lichee PI 4A Board"
diff --git a/arch/riscv/dts/jh7110-starfive-visionfive-2-u-boot.dtsi b/arch/riscv/dts/jh7110-starfive-visionfive-2-u-boot.dtsi
index 13f69da..5518531 100644
--- a/arch/riscv/dts/jh7110-starfive-visionfive-2-u-boot.dtsi
+++ b/arch/riscv/dts/jh7110-starfive-visionfive-2-u-boot.dtsi
@@ -103,4 +103,15 @@
};
};
};
+
+ spl-img {
+ filename = "spl/u-boot-spl.bin.normal.out";
+
+ mkimage {
+ args = "-T sfspl";
+
+ u-boot-spl {
+ };
+ };
+};
};
diff --git a/board/starfive/visionfive2/starfive_visionfive2.c b/board/starfive/visionfive2/starfive_visionfive2.c
index d609262..05d8d2d 100644
--- a/board/starfive/visionfive2/starfive_visionfive2.c
+++ b/board/starfive/visionfive2/starfive_visionfive2.c
@@ -5,14 +5,20 @@
*/
#include <common.h>
-#include <asm/io.h>
-#include <asm/sections.h>
#include <cpu_func.h>
#include <dm.h>
+#include <env.h>
+#include <asm/arch/eeprom.h>
+#include <asm/io.h>
+#include <asm/sections.h>
#include <linux/bitops.h>
#define JH7110_L2_PREFETCHER_BASE_ADDR 0x2030000
#define JH7110_L2_PREFETCHER_HART_OFFSET 0x2000
+#define FDTFILE_VISIONFIVE2_1_2A \
+ "starfive/jh7110-starfive-visionfive-2-v1.2a.dtb"
+#define FDTFILE_VISIONFIVE2_1_3B \
+ "starfive/jh7110-starfive-visionfive-2-v1.3b.dtb"
/* enable U74-mc hart1~hart4 prefetcher */
static void enable_prefetcher(void)
@@ -33,6 +39,31 @@
}
}
+/**
+ * set_fdtfile() - set the $fdtfile variable based on the board revision
+ */
+static void set_fdtfile(void)
+{
+ u8 version;
+ const char *fdtfile;
+
+ version = get_pcb_revision_from_eeprom();
+ switch (version) {
+ case 'a':
+ case 'A':
+ fdtfile = FDTFILE_VISIONFIVE2_1_2A;
+ break;
+
+ case 'b':
+ case 'B':
+ default:
+ fdtfile = FDTFILE_VISIONFIVE2_1_3B;
+ break;
+ };
+
+ env_set("fdtfile", fdtfile);
+}
+
int board_init(void)
{
enable_caches();
@@ -41,6 +72,14 @@
return 0;
}
+int board_late_init(void)
+{
+ if (CONFIG_IS_ENABLED(ID_EEPROM))
+ set_fdtfile();
+
+ return 0;
+}
+
void *board_fdt_blob_setup(int *err)
{
*err = 0;
diff --git a/boot/image.c b/boot/image.c
index 26f68d4..88b67bc 100644
--- a/boot/image.c
+++ b/boot/image.c
@@ -182,6 +182,7 @@
{ IH_TYPE_SUNXI_TOC0, "sunxi_toc0", "Allwinner TOC0 Boot Image" },
{ IH_TYPE_FDT_LEGACY, "fdt_legacy", "legacy Image with Flat Device Tree ", },
{ IH_TYPE_RENESAS_SPKG, "spkgimage", "Renesas SPKG Image" },
+ { IH_TYPE_STARFIVE_SPL, "sfspl", "StarFive SPL Image" },
{ -1, "", "", },
};
diff --git a/doc/board/starfive/visionfive2.rst b/doc/board/starfive/visionfive2.rst
index 941899a..f5575ab 100644
--- a/doc/board/starfive/visionfive2.rst
+++ b/doc/board/starfive/visionfive2.rst
@@ -65,18 +65,8 @@
make starfive_visionfive2_defconfig
make OPENSBI=$(opensbi_dir)/opensbi/build/platform/generic/firmware/fw_dynamic.bin
-This will generate spl/u-boot-spl.bin and FIT image (u-boot.itb)
-
-u-boot-spl.bin cannot be used directly on StarFive VisionFive2,we need
-to convert the u-boot-spl.bin to u-boot-spl.bin.normal.out with
-the below command:
-
- ./spl_tool -c -f $(Uboot_PATH)/spl/u-boot-spl.bin
-
-More detailed description of spl_tool,please refer spl_tool documenation.
-(Note: spl_tool git repo is at https://github.com/starfive-tech/Tools/tree/master/spl_tool)
-
-This will generate u-boot-spl.bin.normal.out file.
+This will generate the U-Boot SPL image (spl/u-boot-spl.bin.normal.out) as well
+as the FIT image (u-boot.itb) with OpenSBI and U-Boot.
Flashing
~~~~~~~~
diff --git a/include/configs/starfive-visionfive2.h b/include/configs/starfive-visionfive2.h
index 4ee02b8..ff43113 100644
--- a/include/configs/starfive-visionfive2.h
+++ b/include/configs/starfive-visionfive2.h
@@ -18,6 +18,9 @@
/* Environment options */
#define BOOT_TARGET_DEVICES(func) \
+ func(NVME, nvme, 0) \
+ func(USB, usb, 0) \
+ func(MMC, mmc, 0) \
func(MMC, mmc, 1) \
func(DHCP, dhcp, na)
diff --git a/include/image.h b/include/image.h
index 01a6787..5f85bf8 100644
--- a/include/image.h
+++ b/include/image.h
@@ -231,6 +231,7 @@
IH_TYPE_SUNXI_TOC0, /* Allwinner TOC0 Boot Image */
IH_TYPE_FDT_LEGACY, /* Binary Flat Device Tree Blob in a Legacy Image */
IH_TYPE_RENESAS_SPKG, /* Renesas SPKG image */
+ IH_TYPE_STARFIVE_SPL, /* StarFive SPL image */
IH_TYPE_COUNT, /* Number of image types */
};
diff --git a/tools/Makefile b/tools/Makefile
index 3d0c4b0..1aa1e36 100644
--- a/tools/Makefile
+++ b/tools/Makefile
@@ -123,6 +123,7 @@
pblimage.o \
pbl_crc32.o \
renesas_spkgimage.o \
+ sfspl.o \
vybridimage.o \
stm32image.o \
$(ROCKCHIP_OBS) \
diff --git a/tools/sfspl.c b/tools/sfspl.c
new file mode 100644
index 0000000..ec18a0a
--- /dev/null
+++ b/tools/sfspl.c
@@ -0,0 +1,174 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Copyright Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
+ *
+ * The StarFive JH7110 requires to prepend a header to u-boot-spl.bin describing
+ * the payload length and CRC32.
+ *
+ * This module implements support in mkimage and dumpimage for this file format.
+ *
+ * StarFive's spl_tool available under GPL-2.0-and-later at
+ * https://github.com/starfive-tech/Tools implements writing the same file
+ * format and served as a reference.
+ */
+
+#include <compiler.h>
+#include <fcntl.h>
+#include <u-boot/crc.h>
+#include <unistd.h>
+#include "imagetool.h"
+
+#define DEFAULT_VERSION 0x01010101
+#define DEFAULT_BACKUP 0x200000U
+#define DEFAULT_OFFSET 0x240
+
+/**
+ * struct spl_hdr - header for SPL on JH7110
+ *
+ * All fields are low-endian.
+ */
+struct spl_hdr {
+ /** @offset: offset to SPL header (0x240) */
+ unsigned int offset;
+ /** @bkp_offs: address of backup SPL, defaults to DEFAULT_BACKUP */
+ unsigned int bkp_offs;
+ /** @zero1: set to zero */
+ unsigned int zero1[159];
+ /** @version: header version, defaults to DEFAULT_VERSION */
+ unsigned int version;
+ /** @file_size: file size */
+ unsigned int file_size;
+ /** @hdr_size: size of the file header (0x400) */
+ unsigned int hdr_size;
+ /** @crc32: CRC32 */
+ unsigned int crc32;
+ /** @zero2: set to zero */
+ unsigned int zero2[91];
+};
+
+static int sfspl_check_params(struct image_tool_params *params)
+{
+ /* Only the RISC-V architecture is supported */
+ if (params->Aflag && params->arch != IH_ARCH_RISCV)
+ return EXIT_FAILURE;
+
+ return EXIT_SUCCESS;
+}
+
+static int sfspl_verify_header(unsigned char *buf, int size,
+ struct image_tool_params *params)
+{
+ struct spl_hdr *hdr = (void *)buf;
+ unsigned int hdr_size = le32_to_cpu(hdr->hdr_size);
+ unsigned int file_size = le32_to_cpu(hdr->file_size);
+ unsigned int crc = le32_to_cpu(hdr->crc32);
+ unsigned int crc_check;
+
+ if (size < 0 ||
+ (size_t)size < sizeof(struct spl_hdr) ||
+ (size_t)size < hdr_size + file_size) {
+ printf("Truncated file\n");
+ return EXIT_FAILURE;
+ }
+ if (hdr->version != DEFAULT_VERSION) {
+ printf("Unknown file format version\n");
+ return EXIT_FAILURE;
+ }
+ crc_check = crc32(0, &buf[hdr_size], size - hdr_size);
+ if (crc_check != crc) {
+ printf("Incorrect CRC32\n");
+ return EXIT_FAILURE;
+ }
+
+ return EXIT_SUCCESS;
+}
+
+static void sfspl_print_header(const void *buf,
+ struct image_tool_params *params)
+{
+ struct spl_hdr *hdr = (void *)buf;
+ unsigned int hdr_size = le32_to_cpu(hdr->hdr_size);
+ unsigned int file_size = le32_to_cpu(hdr->file_size);
+
+ printf("Header size: %u\n", hdr_size);
+ printf("Payload size: %u\n", file_size);
+}
+
+static int sfspl_image_extract_subimage(void *ptr,
+ struct image_tool_params *params)
+{
+ struct spl_hdr *hdr = (void *)ptr;
+ unsigned char *buf = ptr;
+ int fd;
+ unsigned int hdr_size = le32_to_cpu(hdr->hdr_size);
+ unsigned int file_size = le32_to_cpu(hdr->file_size);
+
+ if (params->pflag) {
+ printf("Invalid image index %d\n", params->pflag);
+ return EXIT_FAILURE;
+ }
+
+ fd = open(params->outfile, O_WRONLY | O_CREAT | O_TRUNC, 0644);
+ if (fd == -1) {
+ perror("Can write file");
+ return EXIT_FAILURE;
+ }
+ if (write(fd, &buf[hdr_size], file_size) != file_size) {
+ perror("Cannot write file");
+ return EXIT_FAILURE;
+ }
+ close(fd);
+
+ return EXIT_SUCCESS;
+}
+
+static int sfspl_check_image_type(uint8_t type)
+{
+ if (type == IH_TYPE_STARFIVE_SPL)
+ return EXIT_SUCCESS;
+
+ return EXIT_FAILURE;
+}
+
+static void sfspl_set_header(void *buf, struct stat *sbuf, int infd,
+ struct image_tool_params *params)
+{
+ struct spl_hdr *hdr = buf;
+ unsigned int file_size;
+ unsigned int crc;
+
+ file_size = params->file_size - sizeof(struct spl_hdr);
+ crc = crc32(0, &((unsigned char *)buf)[sizeof(struct spl_hdr)],
+ file_size);
+
+ hdr->offset = cpu_to_le32(DEFAULT_OFFSET);
+ hdr->bkp_offs = cpu_to_le32(DEFAULT_BACKUP);
+ hdr->version = cpu_to_le32(DEFAULT_VERSION);
+ hdr->file_size = cpu_to_le32(file_size);
+ hdr->hdr_size = cpu_to_le32(sizeof(struct spl_hdr));
+ hdr->crc32 = cpu_to_le32(crc);
+}
+
+static int sfspl_vrec_header(struct image_tool_params *params,
+ struct image_type_params *tparams)
+{
+ tparams->hdr = calloc(sizeof(struct spl_hdr), 1);
+
+ /* No padding */
+ return 0;
+}
+
+U_BOOT_IMAGE_TYPE(
+ sfspl, /* id */
+ "StarFive SPL Image", /* name */
+ sizeof(struct spl_hdr), /* header_size */
+ NULL, /* header */
+ sfspl_check_params, /* check_params */
+ sfspl_verify_header, /* verify header */
+ sfspl_print_header, /* print header */
+ sfspl_set_header, /* set header */
+ sfspl_image_extract_subimage, /* extract_subimage */
+ sfspl_check_image_type, /* check_image_type */
+ NULL, /* fflag_handle */
+ sfspl_vrec_header /* vrec_header */
+);