global: Migrate CONFIG_SMP_PEN_ADDR to CFG
Perform a simple rename of CONFIG_SMP_PEN_ADDR to CFG_SMP_PEN_ADDR
Signed-off-by: Tom Rini <trini@konsulko.com>
diff --git a/include/configs/arndale.h b/include/configs/arndale.h
index 8acc525..b56effc 100644
--- a/include/configs/arndale.h
+++ b/include/configs/arndale.h
@@ -16,7 +16,7 @@
/* Miscellaneous configurable options */
-#define CONFIG_SMP_PEN_ADDR 0x02020000
+#define CFG_SMP_PEN_ADDR 0x02020000
/* The PERIPHBASE in the CBAR register is wrong on the Arndale, so override it */
#define CFG_ARM_GIC_BASE_ADDRESS 0x10480000
diff --git a/include/configs/km/pg-wcom-ls102xa.h b/include/configs/km/pg-wcom-ls102xa.h
index 423bb77..15ef68a 100644
--- a/include/configs/km/pg-wcom-ls102xa.h
+++ b/include/configs/km/pg-wcom-ls102xa.h
@@ -158,7 +158,7 @@
{1, {I2C_NULL_HOP} }, \
}
-#define CONFIG_SMP_PEN_ADDR 0x01ee0200
+#define CFG_SMP_PEN_ADDR 0x01ee0200
#define HWCONFIG_BUFFER_SIZE 256
diff --git a/include/configs/ls1021aiot.h b/include/configs/ls1021aiot.h
index 53d9936..83ab94e 100644
--- a/include/configs/ls1021aiot.h
+++ b/include/configs/ls1021aiot.h
@@ -68,7 +68,7 @@
#define FSL_PCIE_COMPAT "fsl,ls1021a-pcie"
-#define CONFIG_SMP_PEN_ADDR 0x01ee0200
+#define CFG_SMP_PEN_ADDR 0x01ee0200
#define HWCONFIG_BUFFER_SIZE 256
diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h
index 78432e5..e4e5522 100644
--- a/include/configs/ls1021aqds.h
+++ b/include/configs/ls1021aqds.h
@@ -242,7 +242,7 @@
* MMC
*/
-#define CONFIG_SMP_PEN_ADDR 0x01ee0200
+#define CFG_SMP_PEN_ADDR 0x01ee0200
#define HWCONFIG_BUFFER_SIZE 256
diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h
index a387eea..eb8fb04 100644
--- a/include/configs/ls1021atwr.h
+++ b/include/configs/ls1021atwr.h
@@ -133,7 +133,7 @@
/* GPIO */
-#define CONFIG_SMP_PEN_ADDR 0x01ee0200
+#define CFG_SMP_PEN_ADDR 0x01ee0200
#define HWCONFIG_BUFFER_SIZE 256