Merge branch 'master' of git://git.denx.de/u-boot-arm
diff --git a/arch/powerpc/cpu/mpc83xx/pcie.c b/arch/powerpc/cpu/mpc83xx/pcie.c
index 1771c48..46a706d 100644
--- a/arch/powerpc/cpu/mpc83xx/pcie.c
+++ b/arch/powerpc/cpu/mpc83xx/pcie.c
@@ -201,18 +201,18 @@
out_le32(&out_win->tarl, 0);
out_le32(&out_win->tarh, 0);
- for (i = 0; i < 2; i++, reg++) {
+ for (i = 0; i < 2; i++) {
u32 ar;
- if (reg->size == 0)
+ if (reg[i].size == 0)
break;
out_win = &pex->bridge.pex_outbound_win[i + 1];
- out_le32(&out_win->bar, reg->phys_start);
- out_le32(&out_win->tarl, reg->bus_start);
+ out_le32(&out_win->bar, reg[i].phys_start);
+ out_le32(&out_win->tarl, reg[i].bus_start);
out_le32(&out_win->tarh, 0);
- ar = PEX_OWAR_EN | (reg->size & PEX_OWAR_SIZE);
- if (reg->flags & PCI_REGION_IO)
+ ar = PEX_OWAR_EN | (reg[i].size & PEX_OWAR_SIZE);
+ if (reg[i].flags & PCI_REGION_IO)
ar |= PEX_OWAR_TYPE_IO;
else
ar |= PEX_OWAR_TYPE_MEM;
diff --git a/board/amcc/acadia/u-boot-nand.lds b/board/amcc/acadia/u-boot-nand.lds
index e256b19..c2a04c7 100644
--- a/board/amcc/acadia/u-boot-nand.lds
+++ b/board/amcc/acadia/u-boot-nand.lds
@@ -26,34 +26,12 @@
{
/* Read-only sections, merged into text segment: */
. = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
.text :
{
/* WARNING - the following is hand-optimized to fit within */
/* the sector layout of our flash chips! XXX FIXME XXX */
- arch/powerpc/cpu/ppc4xx/start.o (.text)
+ arch/powerpc/cpu/ppc4xx/start.o (.text*)
/* Align to next NAND block */
. = ALIGN(0x4000);
@@ -61,8 +39,7 @@
/* Keep some space here for redundant env and potential bad env blocks */
. = ALIGN(0x10000);
- *(.text)
- *(.got1)
+ *(.text*)
}
_etext = .;
PROVIDE (etext = .);
@@ -70,9 +47,6 @@
{
*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
}
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
/* Read-write section, merged into data segment: */
. = (. + 0x00FF) & 0xFFFFFF00;
@@ -80,23 +54,19 @@
PROVIDE (erotext = .);
.reloc :
{
- *(.got)
+ KEEP(*(.got))
_GOT2_TABLE_ = .;
- *(.got2)
+ KEEP(*(.got2))
_FIXUP_TABLE_ = .;
- *(.fixup)
+ KEEP(*(.fixup))
}
__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
__fixup_entries = (. - _FIXUP_TABLE_)>>2;
.data :
{
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
+ *(.data*)
+ *(.sdata*)
}
_edata = .;
PROVIDE (edata = .);
@@ -122,9 +92,8 @@
__bss_start = .;
.bss (NOLOAD) :
{
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
+ *(.bss*)
+ *(.sbss*)
*(COMMON)
. = ALIGN(4);
}
diff --git a/board/amcc/kilauea/u-boot-nand.lds b/board/amcc/kilauea/u-boot-nand.lds
index e256b19..c2a04c7 100644
--- a/board/amcc/kilauea/u-boot-nand.lds
+++ b/board/amcc/kilauea/u-boot-nand.lds
@@ -26,34 +26,12 @@
{
/* Read-only sections, merged into text segment: */
. = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
.text :
{
/* WARNING - the following is hand-optimized to fit within */
/* the sector layout of our flash chips! XXX FIXME XXX */
- arch/powerpc/cpu/ppc4xx/start.o (.text)
+ arch/powerpc/cpu/ppc4xx/start.o (.text*)
/* Align to next NAND block */
. = ALIGN(0x4000);
@@ -61,8 +39,7 @@
/* Keep some space here for redundant env and potential bad env blocks */
. = ALIGN(0x10000);
- *(.text)
- *(.got1)
+ *(.text*)
}
_etext = .;
PROVIDE (etext = .);
@@ -70,9 +47,6 @@
{
*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
}
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
/* Read-write section, merged into data segment: */
. = (. + 0x00FF) & 0xFFFFFF00;
@@ -80,23 +54,19 @@
PROVIDE (erotext = .);
.reloc :
{
- *(.got)
+ KEEP(*(.got))
_GOT2_TABLE_ = .;
- *(.got2)
+ KEEP(*(.got2))
_FIXUP_TABLE_ = .;
- *(.fixup)
+ KEEP(*(.fixup))
}
__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
__fixup_entries = (. - _FIXUP_TABLE_)>>2;
.data :
{
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
+ *(.data*)
+ *(.sdata*)
}
_edata = .;
PROVIDE (edata = .);
@@ -122,9 +92,8 @@
__bss_start = .;
.bss (NOLOAD) :
{
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
+ *(.bss*)
+ *(.sbss*)
*(COMMON)
. = ALIGN(4);
}
diff --git a/board/freescale/p1022ds/diu.c b/board/freescale/p1022ds/diu.c
index 12b40a0..8f5305c 100644
--- a/board/freescale/p1022ds/diu.c
+++ b/board/freescale/p1022ds/diu.c
@@ -32,6 +32,7 @@
#define PMUXCR_ELBCDIU_MASK 0xc0000000
#define PMUXCR_ELBCDIU_NOR16 0x80000000
+#define PMUXCR_ELBCDIU_DIU 0x40000000
/*
* DIU Area Descriptor
@@ -131,9 +132,8 @@
px_brdcfg0 = in_8(lbc_lcs1_ba);
out_8(lbc_lcs1_ba, px_brdcfg0 | PX_BRDCFG0_ELBC_DIU);
- /* Setting PMUXCR to switch to DVI from ELBC */
- clrsetbits_be32(&gur->pmuxcr,
- PMUXCR_ELBCDIU_MASK, PMUXCR_ELBCDIU_NOR16);
+ /* Set PMUXCR to switch the muxed pins from the LBC to the DIU */
+ clrsetbits_be32(&gur->pmuxcr, PMUXCR_ELBCDIU_MASK, PMUXCR_ELBCDIU_DIU);
pmuxcr = in_be32(&gur->pmuxcr);
return fsl_diu_init(*xres, pixel_format, 0);
@@ -161,7 +161,7 @@
ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
/* Switch the muxes only if they're currently set to DIU mode */
- if ((in_be32(&gur->pmuxcr) & PMUXCR_ELBCDIU_MASK) ==
+ if ((in_be32(&gur->pmuxcr) & PMUXCR_ELBCDIU_MASK) !=
PMUXCR_ELBCDIU_NOR16) {
/*
* In DIU mode, the PIXIS can only be accessed indirectly
@@ -216,8 +216,17 @@
int sw = set_mux_to_lbc();
__raw_writeb(value, addr);
- if (sw)
+ if (sw) {
+ /*
+ * To ensure the post-write is completed to eLBC, software must
+ * perform a dummy read from one valid address from eLBC space
+ * before changing the eLBC_DIU from NOR mode to DIU mode.
+ * set_mux_to_diu() includes a sync that will ensure the
+ * __raw_readb() completes before it switches the mux.
+ */
+ __raw_readb(addr);
set_mux_to_diu();
+ }
}
void flash_write16(u16 value, void *addr)
@@ -225,8 +234,17 @@
int sw = set_mux_to_lbc();
__raw_writew(value, addr);
- if (sw)
+ if (sw) {
+ /*
+ * To ensure the post-write is completed to eLBC, software must
+ * perform a dummy read from one valid address from eLBC space
+ * before changing the eLBC_DIU from NOR mode to DIU mode.
+ * set_mux_to_diu() includes a sync that will ensure the
+ * __raw_readb() completes before it switches the mux.
+ */
+ __raw_readb(addr);
set_mux_to_diu();
+ }
}
void flash_write32(u32 value, void *addr)
@@ -234,18 +252,47 @@
int sw = set_mux_to_lbc();
__raw_writel(value, addr);
- if (sw)
+ if (sw) {
+ /*
+ * To ensure the post-write is completed to eLBC, software must
+ * perform a dummy read from one valid address from eLBC space
+ * before changing the eLBC_DIU from NOR mode to DIU mode.
+ * set_mux_to_diu() includes a sync that will ensure the
+ * __raw_readb() completes before it switches the mux.
+ */
+ __raw_readb(addr);
set_mux_to_diu();
+ }
}
void flash_write64(u64 value, void *addr)
{
int sw = set_mux_to_lbc();
+ uint32_t *p = addr;
+
+ /*
+ * There is no __raw_writeq(), so do the write manually. We don't trust
+ * the compiler, so we use inline assembly.
+ */
+ __asm__ __volatile__(
+ "stw%U0%X0 %2,%0;\n"
+ "stw%U1%X1 %3,%1;\n"
+ : "=m" (*p), "=m" (*(p + 1))
+ : "r" ((uint32_t) (value >> 32)), "r" ((uint32_t) (value)));
- /* There is no __raw_writeq(), so do the write manually */
- *(volatile u64 *)addr = value;
- if (sw)
+ if (sw) {
+ /*
+ * To ensure the post-write is completed to eLBC, software must
+ * perform a dummy read from one valid address from eLBC space
+ * before changing the eLBC_DIU from NOR mode to DIU mode. We
+ * read addr+4 because we just wrote to addr+4, so that's how we
+ * maintain execution order. set_mux_to_diu() includes a sync
+ * that will ensure the __raw_readb() completes before it
+ * switches the mux.
+ */
+ __raw_readb(addr + 4);
set_mux_to_diu();
+ }
}
u8 flash_read8(void *addr)
diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
index a368fe6..57cd4ee 100644
--- a/drivers/mmc/fsl_esdhc.c
+++ b/drivers/mmc/fsl_esdhc.c
@@ -384,10 +384,6 @@
int ret = 0;
u8 card_absent;
- /* Enable cache snooping */
- if (cfg && !cfg->no_snoop)
- esdhc_write32(®s->scr, 0x00000040);
-
/* Reset the entire host controller */
esdhc_write32(®s->sysctl, SYSCTL_RSTA);
@@ -395,6 +391,10 @@
while ((esdhc_read32(®s->sysctl) & SYSCTL_RSTA) && --timeout)
udelay(1000);
+ /* Enable cache snooping */
+ if (cfg && !cfg->no_snoop)
+ esdhc_write32(®s->scr, 0x00000040);
+
esdhc_write32(®s->sysctl, SYSCTL_HCKEN | SYSCTL_IPGEN);
/* Set the initial clock speed */
diff --git a/drivers/mtd/nand/fsl_upm.c b/drivers/mtd/nand/fsl_upm.c
index 7cb99cb..c33e278 100644
--- a/drivers/mtd/nand/fsl_upm.c
+++ b/drivers/mtd/nand/fsl_upm.c
@@ -21,6 +21,7 @@
static void fsl_upm_start_pattern(struct fsl_upm *upm, u32 pat_offset)
{
clrsetbits_be32(upm->mxmr, MxMR_MAD_MSK, MxMR_OP_RUNP | pat_offset);
+ (void)in_be32(upm->mxmr);
}
static void fsl_upm_end_pattern(struct fsl_upm *upm)
@@ -35,6 +36,7 @@
void __iomem *io_addr, u32 mar)
{
out_be32(upm->mar, mar);
+ (void)in_be32(upm->mar);
switch (width) {
case 8:
out_8(io_addr, 0x0);
diff --git a/drivers/net/tsec.c b/drivers/net/tsec.c
index 9b5dd92..77908d1 100644
--- a/drivers/net/tsec.c
+++ b/drivers/net/tsec.c
@@ -5,7 +5,7 @@
* terms of the GNU Public License, Version 2, incorporated
* herein by reference.
*
- * Copyright 2004-2009 Freescale Semiconductor, Inc.
+ * Copyright 2004-2010 Freescale Semiconductor, Inc.
* (C) Copyright 2003, Motorola, Inc.
* author Andy Fleming
*
@@ -292,13 +292,12 @@
/* By default force the TBI PHY into 1000Mbps full duplex when in SGMII mode */
#ifndef CONFIG_TSEC_TBICR_SETTINGS
-#define TBICR_SETTINGS ( \
+#define CONFIG_TSEC_TBICR_SETTINGS ( \
TBICR_PHY_RESET \
+ | TBICR_ANEG_ENABLE \
| TBICR_FULL_DUPLEX \
| TBICR_SPEED1_SET \
)
-#else
-#define TBICR_SETTINGS CONFIG_TSEC_TBICR_SETTINGS
#endif /* CONFIG_TSEC_TBICR_SETTINGS */
/* Configure the TBI for SGMII operation */
@@ -311,7 +310,7 @@
tsec_local_mdio_write(priv->phyregs_sgmii, priv->regs->tbipa, TBI_TBICON,
TBICON_CLK_SELECT);
tsec_local_mdio_write(priv->phyregs_sgmii, priv->regs->tbipa, TBI_CR,
- TBICR_SETTINGS);
+ CONFIG_TSEC_TBICR_SETTINGS);
}
/* Discover which PHY is attached to the device, and configure it
diff --git a/include/configs/P1_P2_RDB.h b/include/configs/P1_P2_RDB.h
index a21afb7..2dfee3d 100644
--- a/include/configs/P1_P2_RDB.h
+++ b/include/configs/P1_P2_RDB.h
@@ -437,14 +437,6 @@
#define CONFIG_PHY_GIGE 1 /* Include GbE speed/duplex detection */
-/* TBI PHY configuration for SGMII mode */
-#define CONFIG_TSEC_TBICR_SETTINGS ( \
- TBICR_PHY_RESET \
- | TBICR_ANEG_ENABLE \
- | TBICR_FULL_DUPLEX \
- | TBICR_SPEED1_SET \
- )
-
#endif /* CONFIG_TSEC_ENET */
/*
diff --git a/include/configs/xpedite537x.h b/include/configs/xpedite537x.h
index e0a1fa4..a74766d 100644
--- a/include/configs/xpedite537x.h
+++ b/include/configs/xpedite537x.h
@@ -375,6 +375,16 @@
#define CONFIG_MII_DEFAULT_TSEC 1 /* Allow unregistered phys */
#define CONFIG_ETHPRIME "eTSEC2"
+/*
+ * In-band SGMII auto-negotiation between TBI and BCM5482S PHY fails, force
+ * 1000mbps SGMII link
+ */
+#define CONFIG_TSEC_TBICR_SETTINGS ( \
+ TBICR_PHY_RESET \
+ | TBICR_FULL_DUPLEX \
+ | TBICR_SPEED1_SET \
+ )
+
#define CONFIG_TSEC1 1
#define CONFIG_TSEC1_NAME "eTSEC1"
#define TSEC1_FLAGS (TSEC_GIGABIT | TSEC_REDUCED)
diff --git a/include/configs/xpedite550x.h b/include/configs/xpedite550x.h
index 42d1f69..a051913 100644
--- a/include/configs/xpedite550x.h
+++ b/include/configs/xpedite550x.h
@@ -345,6 +345,16 @@
#define CONFIG_MII_DEFAULT_TSEC 1 /* Allow unregistered phys */
#define CONFIG_ETHPRIME "eTSEC2"
+/*
+ * In-band SGMII auto-negotiation between TBI and BCM5482S PHY fails, force
+ * 1000mbps SGMII link
+ */
+#define CONFIG_TSEC_TBICR_SETTINGS ( \
+ TBICR_PHY_RESET \
+ | TBICR_FULL_DUPLEX \
+ | TBICR_SPEED1_SET \
+ )
+
#define CONFIG_TSEC1 1
#define CONFIG_TSEC1_NAME "eTSEC1"
#define TSEC1_FLAGS (TSEC_GIGABIT | TSEC_REDUCED)
diff --git a/nand_spl/board/amcc/acadia/Makefile b/nand_spl/board/amcc/acadia/Makefile
index bee24bc..f8ca654 100644
--- a/nand_spl/board/amcc/acadia/Makefile
+++ b/nand_spl/board/amcc/acadia/Makefile
@@ -51,7 +51,7 @@
$(OBJCOPY) ${OBJCFLAGS} -O binary $< $@
$(nandobj)u-boot-spl: $(OBJS) $(nandobj)u-boot.lds
- cd $(LNDIR) && $(LD) $(LDFLAGS) $(__OBJS) \
+ cd $(LNDIR) && $(LD) $(LDFLAGS) $(__OBJS) $(PLATFORM_LIBS) \
-Map $(nandobj)u-boot-spl.map \
-o $(nandobj)u-boot-spl
diff --git a/nand_spl/board/amcc/bamboo/Makefile b/nand_spl/board/amcc/bamboo/Makefile
index 0288c58..438dfbf 100644
--- a/nand_spl/board/amcc/bamboo/Makefile
+++ b/nand_spl/board/amcc/bamboo/Makefile
@@ -50,7 +50,7 @@
$(OBJCOPY) ${OBJCFLAGS} -O binary $< $@
$(nandobj)u-boot-spl: $(OBJS) $(nandobj)u-boot.lds
- cd $(LNDIR) && $(LD) $(LDFLAGS) $(__OBJS) \
+ cd $(LNDIR) && $(LD) $(LDFLAGS) $(__OBJS) $(PLATFORM_LIBS) \
-Map $(nandobj)u-boot-spl.map \
-o $(nandobj)u-boot-spl
diff --git a/nand_spl/board/amcc/canyonlands/Makefile b/nand_spl/board/amcc/canyonlands/Makefile
index ab98d6f..40034e1 100644
--- a/nand_spl/board/amcc/canyonlands/Makefile
+++ b/nand_spl/board/amcc/canyonlands/Makefile
@@ -55,7 +55,7 @@
$(OBJCOPY) ${OBJCFLAGS} -O binary $< $@
$(nandobj)u-boot-spl: $(OBJS) $(nandobj)u-boot.lds
- cd $(LNDIR) && $(LD) $(LDFLAGS) $(__OBJS) \
+ cd $(LNDIR) && $(LD) $(LDFLAGS) $(__OBJS) $(PLATFORM_LIBS) \
-Map $(nandobj)u-boot-spl.map \
-o $(nandobj)u-boot-spl
diff --git a/nand_spl/board/amcc/kilauea/Makefile b/nand_spl/board/amcc/kilauea/Makefile
index 78c67a2..3835f3f 100644
--- a/nand_spl/board/amcc/kilauea/Makefile
+++ b/nand_spl/board/amcc/kilauea/Makefile
@@ -50,7 +50,7 @@
$(OBJCOPY) ${OBJCFLAGS} -O binary $< $@
$(nandobj)u-boot-spl: $(OBJS) $(nandobj)u-boot.lds
- cd $(LNDIR) && $(LD) $(LDFLAGS) $(__OBJS) \
+ cd $(LNDIR) && $(LD) $(LDFLAGS) $(__OBJS) $(PLATFORM_LIBS) \
-Map $(nandobj)u-boot-spl.map \
-o $(nandobj)u-boot-spl
diff --git a/nand_spl/board/amcc/sequoia/Makefile b/nand_spl/board/amcc/sequoia/Makefile
index d3e28ce..9120f15 100644
--- a/nand_spl/board/amcc/sequoia/Makefile
+++ b/nand_spl/board/amcc/sequoia/Makefile
@@ -50,7 +50,7 @@
$(OBJCOPY) ${OBJCFLAGS} -O binary $< $@
$(nandobj)u-boot-spl: $(OBJS) $(nandobj)u-boot.lds
- cd $(LNDIR) && $(LD) $(LDFLAGS) $(__OBJS) \
+ cd $(LNDIR) && $(LD) $(LDFLAGS) $(__OBJS) $(PLATFORM_LIBS) \
-Map $(nandobj)u-boot-spl.map \
-o $(nandobj)u-boot-spl
diff --git a/nand_spl/board/freescale/mpc8313erdb/Makefile b/nand_spl/board/freescale/mpc8313erdb/Makefile
index 88c15a4..cf81099 100644
--- a/nand_spl/board/freescale/mpc8313erdb/Makefile
+++ b/nand_spl/board/freescale/mpc8313erdb/Makefile
@@ -55,7 +55,7 @@
$(OBJCOPY) ${OBJCFLAGS} -O binary $< $@
$(nandobj)u-boot-spl: $(OBJS) $(nandobj)u-boot.lds
- cd $(LNDIR) && $(LD) $(LDFLAGS) $(__OBJS) \
+ cd $(LNDIR) && $(LD) $(LDFLAGS) $(__OBJS) $(PLATFORM_LIBS) \
-Map $(nandobj)u-boot-spl.map \
-o $(nandobj)u-boot-spl
diff --git a/nand_spl/board/freescale/mpc8315erdb/Makefile b/nand_spl/board/freescale/mpc8315erdb/Makefile
index 88c15a4..cf81099 100644
--- a/nand_spl/board/freescale/mpc8315erdb/Makefile
+++ b/nand_spl/board/freescale/mpc8315erdb/Makefile
@@ -55,7 +55,7 @@
$(OBJCOPY) ${OBJCFLAGS} -O binary $< $@
$(nandobj)u-boot-spl: $(OBJS) $(nandobj)u-boot.lds
- cd $(LNDIR) && $(LD) $(LDFLAGS) $(__OBJS) \
+ cd $(LNDIR) && $(LD) $(LDFLAGS) $(__OBJS) $(PLATFORM_LIBS) \
-Map $(nandobj)u-boot-spl.map \
-o $(nandobj)u-boot-spl
diff --git a/nand_spl/board/sheldon/simpc8313/Makefile b/nand_spl/board/sheldon/simpc8313/Makefile
index 86e5ecb..bc6dc65 100644
--- a/nand_spl/board/sheldon/simpc8313/Makefile
+++ b/nand_spl/board/sheldon/simpc8313/Makefile
@@ -55,7 +55,7 @@
$(OBJCOPY) ${OBJCFLAGS} -O binary $< $@
$(nandobj)u-boot-spl: $(OBJS) $(nandobj)u-boot.lds
- cd $(LNDIR) && $(LD) $(LDFLAGS) $(__OBJS) \
+ cd $(LNDIR) && $(LD) $(LDFLAGS) $(__OBJS) $(PLATFORM_LIBS) \
-Map $(nandobj)u-boot-spl.map \
-o $(nandobj)u-boot-spl