i.MX6SX: crypto/fsl: fix entropy delay value
RNG Hardware error is reported due to incorrect entropy delay
rng self test are run to determine the correct ent_dly.
test is executed with different voltage and temperature to identify the
worst case value for ent_dly. after adding a margin value(1000),
ent_dly should be at least 12000.
Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
diff --git a/drivers/crypto/fsl/jr.c b/drivers/crypto/fsl/jr.c
index 1d951cf..85a3dac 100644
--- a/drivers/crypto/fsl/jr.c
+++ b/drivers/crypto/fsl/jr.c
@@ -623,7 +623,7 @@
static int rng_init(uint8_t sec_idx, ccsr_sec_t *sec)
{
- int ret, gen_sk, ent_delay = RTSDCTL_ENT_DLY_MIN;
+ int ret, gen_sk, ent_delay = RTSDCTL_ENT_DLY;
struct rng4tst __iomem *rng =
(struct rng4tst __iomem *)&sec->rng;
u32 inst_handles;
@@ -652,6 +652,15 @@
* the RNG.
*/
ret = instantiate_rng(sec_idx, sec, gen_sk);
+ /*
+ * entropy delay is calculated via self-test method.
+ * self-test are run across different volatge, temp.
+ * if worst case value for ent_dly is identified,
+ * loop can be skipped for that platform.
+ */
+ if (IS_ENABLED(CONFIG_MX6SX))
+ break;
+
} while ((ret == -1) && (ent_delay < RTSDCTL_ENT_DLY_MAX));
if (ret) {
printf("SEC%u: Failed to instantiate RNG\n", sec_idx);