commit b7f9ea94056ef374fb885d881ed6a922163a6c76
author Peng Fan <peng.fan@nxp.com> Thu Oct 18 14:28:31 2018 +0200
committer Stefano Babic <sbabic@denx.de> Mon Oct 22 12:59:02 2018 +0200
tree 0a4a56c06286ecec42f05b124722b812c310fa5a
parent 5e80d5ae6d85217b9df64f4ccc966844404cdb83

serial_lpuart: Update lpuart driver to support i.MX8

Add i.MX8 compatible string and cpu type support to lpuart driver,
to use little endian 32 bits configurations.

Also, according to RM, the Receive FIFO Enable (RXFE) field in LPUART
FIFO register is bit 3, so this definition should change to 0x08
(not 0x40) for i.MX8, otherwise the Receive FIFO is not disabled.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Cc: Stefano Babic <sbabic@denx.de>

drivers/serial/serial_lpuart.c

diff --git a/drivers/serial/serial_lpuart.c b/drivers/serial/serial_lpuart.c
index 1212b72..c14a810 100644
--- a/drivers/serial/serial_lpuart.c
+++ b/drivers/serial/serial_lpuart.c
@@ -41,7 +41,11 @@
 #define CTRL_RE		(1 << 18)
 
 #define FIFO_TXFE		0x80
+#ifdef CONFIG_ARCH_IMX8
+#define FIFO_RXFE		0x08
+#else
 #define FIFO_RXFE		0x40
+#endif
 
 #define WATER_TXWATER_OFF	1
 #define WATER_RXWATER_OFF	16
@@ -54,7 +58,8 @@
 enum lpuart_devtype {
 	DEV_VF610 = 1,
 	DEV_LS1021A,
-	DEV_MX7ULP
+	DEV_MX7ULP,
+	DEV_IMX8
 };
 
 struct lpuart_serial_platdata {
@@ -325,7 +330,7 @@
 
 	lpuart_write32(plat->flags, &base->match, 0);
 
-	if (plat->devtype == DEV_MX7ULP) {
+	if (plat->devtype == DEV_MX7ULP || plat->devtype == DEV_IMX8) {
 		_lpuart32_serial_setbrg_7ulp(plat, gd->baudrate);
 	} else {
 		/* provide data bits, parity, stop bit, etc */
@@ -342,7 +347,7 @@
 	struct lpuart_serial_platdata *plat = dev->platdata;
 
 	if (is_lpuart32(dev)) {
-		if (plat->devtype == DEV_MX7ULP)
+		if (plat->devtype == DEV_MX7ULP || plat->devtype == DEV_IMX8)
 			_lpuart32_serial_setbrg_7ulp(plat, baudrate);
 		else
 			_lpuart32_serial_setbrg(plat, baudrate);
@@ -427,6 +432,8 @@
 		plat->devtype = DEV_MX7ULP;
 	else if (!fdt_node_check_compatible(blob, node, "fsl,vf610-lpuart"))
 		plat->devtype = DEV_VF610;
+	else if (!fdt_node_check_compatible(blob, node, "fsl,imx8qm-lpuart"))
+		plat->devtype = DEV_IMX8;
 
 	return 0;
 }
@@ -444,6 +451,8 @@
 	{ .compatible = "fsl,imx7ulp-lpuart",
 		.data = LPUART_FLAG_REGMAP_32BIT_REG },
 	{ .compatible = "fsl,vf610-lpuart"},
+	{ .compatible = "fsl,imx8qm-lpuart",
+		.data = LPUART_FLAG_REGMAP_32BIT_REG },
 	{ }
 };
 

include/fsl_lpuart.h

diff --git a/include/fsl_lpuart.h b/include/fsl_lpuart.h
index 02ebfef..fc517d4 100644
--- a/include/fsl_lpuart.h
+++ b/include/fsl_lpuart.h
@@ -4,7 +4,7 @@
  *
  */
 
-#ifdef CONFIG_ARCH_MX7ULP
+#if defined(CONFIG_ARCH_MX7ULP) || defined(CONFIG_ARCH_IMX8)
 struct lpuart_fsl_reg32 {
 	u32 verid;
 	u32 param;