commit b6fe7ad7eef3dbd8387bef5f02f44aee67a112a0
author Michal Simek <michal.simek@xilinx.com> Mon Aug 17 09:50:09 2015 +0200
committer Michal Simek <michal.simek@xilinx.com> Thu Nov 19 13:50:09 2015 +0100
tree b8177628e783598156afcb1bbad15d4c94087c8b
parent c6eb0bc0ec34da9c394df89a4f5c678b82e0bcf3

net: zynq: Setup BD when structures are filled

Fix incorrect sequence in BD handling.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>

drivers/net/zynq_gem.c

diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c
index 875738a..b8686f3 100644
--- a/drivers/net/zynq_gem.c
+++ b/drivers/net/zynq_gem.c
@@ -406,9 +406,6 @@
 	struct zynq_gem_priv *priv = dev->priv;
 	struct zynq_gem_regs *regs = (struct zynq_gem_regs *)dev->iobase;
 
-	/* setup BD */
-	writel((ulong)priv->tx_bd, &regs->txqbase);
-
 	/* Setup Tx BD */
 	memset(priv->tx_bd, 0, sizeof(struct emac_bd));
 
@@ -417,6 +414,9 @@
 			       ZYNQ_GEM_TXBUF_LAST_MASK |
 			       ZYNQ_GEM_TXBUF_WRAP_MASK;
 
+	/* setup BD */
+	writel((ulong)priv->tx_bd, &regs->txqbase);
+
 	addr = (ulong) ptr;
 	addr &= ~(ARCH_DMA_MINALIGN - 1);
 	size = roundup(len, ARCH_DMA_MINALIGN);