riscv: Remove common.h usage
We can remove common.h from most cases of the code here, and only a few
places need an additional header instead.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Rick Chen <rick@andestech.com>
diff --git a/arch/riscv/lib/aclint_ipi.c b/arch/riscv/lib/aclint_ipi.c
index 90b8e12..dcd7e5e 100644
--- a/arch/riscv/lib/aclint_ipi.c
+++ b/arch/riscv/lib/aclint_ipi.c
@@ -8,7 +8,6 @@
* associated with software and timer interrupts.
*/
-#include <common.h>
#include <dm.h>
#include <regmap.h>
#include <syscon.h>
diff --git a/arch/riscv/lib/andes_plicsw.c b/arch/riscv/lib/andes_plicsw.c
index 6fd49e8..6a63661 100644
--- a/arch/riscv/lib/andes_plicsw.c
+++ b/arch/riscv/lib/andes_plicsw.c
@@ -8,7 +8,6 @@
* similar to RISC-V PLIC.
*/
-#include <common.h>
#include <dm.h>
#include <asm/global_data.h>
#include <dm/device-internal.h>
diff --git a/arch/riscv/lib/asm-offsets.c b/arch/riscv/lib/asm-offsets.c
index 452dfce..875bb9a 100644
--- a/arch/riscv/lib/asm-offsets.c
+++ b/arch/riscv/lib/asm-offsets.c
@@ -8,7 +8,6 @@
* assembly language modules.
*/
-#include <common.h>
#include <asm/global_data.h>
#include <linux/kbuild.h>
diff --git a/arch/riscv/lib/boot.c b/arch/riscv/lib/boot.c
index 778d011..03014c5 100644
--- a/arch/riscv/lib/boot.c
+++ b/arch/riscv/lib/boot.c
@@ -4,8 +4,7 @@
* Rick Chen, Andes Technology Corporation <rick@andestech.com>
*/
-#include <common.h>
-#include <command.h>
+#include <asm/u-boot.h>
unsigned long do_go_exec(ulong (*entry)(int, char * const []),
int argc, char *const argv[])
diff --git a/arch/riscv/lib/bootm.c b/arch/riscv/lib/bootm.c
index cc30efc..f9e1e18 100644
--- a/arch/riscv/lib/bootm.c
+++ b/arch/riscv/lib/bootm.c
@@ -6,7 +6,6 @@
* Rick Chen, Andes Technology Corporation <rick@andestech.com>
*/
-#include <common.h>
#include <bootstage.h>
#include <command.h>
#include <dm.h>
diff --git a/arch/riscv/lib/cache.c b/arch/riscv/lib/cache.c
index 686e699..c46b49e 100644
--- a/arch/riscv/lib/cache.c
+++ b/arch/riscv/lib/cache.c
@@ -4,7 +4,6 @@
* Rick Chen, Andes Technology Corporation <rick@andestech.com>
*/
-#include <common.h>
#include <cpu_func.h>
void invalidate_icache_all(void)
diff --git a/arch/riscv/lib/fdt_fixup.c b/arch/riscv/lib/fdt_fixup.c
index 36c16e9..c658e72 100644
--- a/arch/riscv/lib/fdt_fixup.c
+++ b/arch/riscv/lib/fdt_fixup.c
@@ -6,7 +6,6 @@
#define LOG_CATEGORY LOGC_ARCH
-#include <common.h>
#include <fdt_support.h>
#include <log.h>
#include <mapmem.h>
diff --git a/arch/riscv/lib/image.c b/arch/riscv/lib/image.c
index a65a5b8d..a82f48e 100644
--- a/arch/riscv/lib/image.c
+++ b/arch/riscv/lib/image.c
@@ -6,7 +6,6 @@
* Based on arm/lib/image.c
*/
-#include <common.h>
#include <image.h>
#include <mapmem.h>
#include <errno.h>
diff --git a/arch/riscv/lib/interrupts.c b/arch/riscv/lib/interrupts.c
index e966afa..02dbcfd 100644
--- a/arch/riscv/lib/interrupts.c
+++ b/arch/riscv/lib/interrupts.c
@@ -10,7 +10,6 @@
*/
#include <linux/compat.h>
-#include <common.h>
#include <efi_loader.h>
#include <hang.h>
#include <irq_func.h>
diff --git a/arch/riscv/lib/reset.c b/arch/riscv/lib/reset.c
index 8779c61..712e1bd 100644
--- a/arch/riscv/lib/reset.c
+++ b/arch/riscv/lib/reset.c
@@ -3,7 +3,6 @@
* Copyright (C) 2018, Bin Meng <bmeng.cn@gmail.com>
*/
-#include <common.h>
#include <command.h>
#include <hang.h>
diff --git a/arch/riscv/lib/sbi.c b/arch/riscv/lib/sbi.c
index 55a3bc3..35a7d3b 100644
--- a/arch/riscv/lib/sbi.c
+++ b/arch/riscv/lib/sbi.c
@@ -7,7 +7,7 @@
* Taken from Linux arch/riscv/kernel/sbi.c
*/
-#include <common.h>
+#include <errno.h>
#include <asm/encoding.h>
#include <asm/sbi.h>
diff --git a/arch/riscv/lib/sbi_ipi.c b/arch/riscv/lib/sbi_ipi.c
index d02e2b4..511d381 100644
--- a/arch/riscv/lib/sbi_ipi.c
+++ b/arch/riscv/lib/sbi_ipi.c
@@ -4,7 +4,6 @@
* Lukas Auer <lukas.auer@aisec.fraunhofer.de>
*/
-#include <common.h>
#include <asm/encoding.h>
#include <asm/sbi.h>
diff --git a/arch/riscv/lib/sifive_cache.c b/arch/riscv/lib/sifive_cache.c
index 2815487..39b0248 100644
--- a/arch/riscv/lib/sifive_cache.c
+++ b/arch/riscv/lib/sifive_cache.c
@@ -3,9 +3,9 @@
* Copyright (C) 2021 SiFive, Inc
*/
-#include <common.h>
#include <cache.h>
#include <cpu_func.h>
+#include <log.h>
#include <dm.h>
void enable_caches(void)
diff --git a/arch/riscv/lib/smp.c b/arch/riscv/lib/smp.c
index f3cd8b9..a692f06 100644
--- a/arch/riscv/lib/smp.c
+++ b/arch/riscv/lib/smp.c
@@ -4,7 +4,6 @@
* Lukas Auer <lukas.auer@aisec.fraunhofer.de>
*/
-#include <common.h>
#include <cpu_func.h>
#include <dm.h>
#include <asm/barrier.h>
diff --git a/arch/riscv/lib/spl.c b/arch/riscv/lib/spl.c
index 9b242ed..9a7a4f6 100644
--- a/arch/riscv/lib/spl.c
+++ b/arch/riscv/lib/spl.c
@@ -3,7 +3,6 @@
* Copyright (C) 2019 Fraunhofer AISEC,
* Lukas Auer <lukas.auer@aisec.fraunhofer.de>
*/
-#include <common.h>
#include <cpu_func.h>
#include <hang.h>
#include <init.h>