x86: Move Intel Management Engine code to a common place
Some of the Intel ME code is common to several Intel CPUs. Move it into a
common location. Add a header file for report_platform.c also.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[squashed in http://patchwork.ozlabs.org/patch/598372/]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
diff --git a/arch/x86/cpu/intel_common/Makefile b/arch/x86/cpu/intel_common/Makefile
index 06de964..1918ca3 100644
--- a/arch/x86/cpu/intel_common/Makefile
+++ b/arch/x86/cpu/intel_common/Makefile
@@ -7,6 +7,8 @@
obj-$(CONFIG_HAVE_MRC) += car.o
obj-y += cpu.o
obj-y += lpc.o
+obj-$(CONFIG_HAVE_MRC) += me_status.o
ifndef CONFIG_TARGET_EFI
obj-y += microcode.o
endif
+obj-$(CONFIG_HAVE_MRC) += report_platform.o
diff --git a/arch/x86/cpu/ivybridge/me_status.c b/arch/x86/cpu/intel_common/me_status.c
similarity index 93%
rename from arch/x86/cpu/ivybridge/me_status.c
rename to arch/x86/cpu/intel_common/me_status.c
index 15cf69f..130d219 100644
--- a/arch/x86/cpu/ivybridge/me_status.c
+++ b/arch/x86/cpu/intel_common/me_status.c
@@ -128,7 +128,14 @@
[0x10] = "Required VSCC values for flash parts do not match",
};
-void intel_me_status(struct me_hfs *hfs, struct me_gmes *gmes)
+
+/**
+ * _intel_me_status() - Check Intel Management Engine status
+ *
+ * struct hfs: Firmware status
+ * struct gmes: Management engine status
+ */
+static void _intel_me_status(struct me_hfs *hfs, struct me_gmes *gmes)
{
/* Check Current States */
debug("ME: FW Partition Table : %s\n",
@@ -193,3 +200,14 @@
}
debug("\n");
}
+
+void intel_me_status(struct udevice *me_dev)
+{
+ struct me_hfs hfs;
+ struct me_gmes gmes;
+
+ pci_read_dword_ptr(me_dev, &hfs, PCI_ME_HFS);
+ pci_read_dword_ptr(me_dev, &gmes, PCI_ME_GMES);
+
+ _intel_me_status(&hfs, &gmes);
+}
diff --git a/arch/x86/cpu/ivybridge/report_platform.c b/arch/x86/cpu/intel_common/report_platform.c
similarity index 97%
rename from arch/x86/cpu/ivybridge/report_platform.c
rename to arch/x86/cpu/intel_common/report_platform.c
index c78322a..05e1cf9 100644
--- a/arch/x86/cpu/ivybridge/report_platform.c
+++ b/arch/x86/cpu/intel_common/report_platform.c
@@ -9,8 +9,8 @@
#include <common.h>
#include <asm/cpu.h>
#include <asm/pci.h>
+#include <asm/report_platform.h>
#include <asm/arch/pch.h>
-#include <asm/arch/sandybridge.h>
static void report_cpu_info(void)
{
diff --git a/arch/x86/cpu/ivybridge/Makefile b/arch/x86/cpu/ivybridge/Makefile
index 78006f1..9cdb07b 100644
--- a/arch/x86/cpu/ivybridge/Makefile
+++ b/arch/x86/cpu/ivybridge/Makefile
@@ -11,10 +11,8 @@
obj-y += early_me.o
obj-y += gma.o
obj-y += lpc.o
-obj-y += me_status.o
obj-y += model_206ax.o
obj-y += northbridge.o
-obj-y += report_platform.o
obj-y += sata.o
obj-y += sdram.o
endif
diff --git a/arch/x86/cpu/ivybridge/early_me.c b/arch/x86/cpu/ivybridge/early_me.c
index b1df77d..cda96ab 100644
--- a/arch/x86/cpu/ivybridge/early_me.c
+++ b/arch/x86/cpu/ivybridge/early_me.c
@@ -27,35 +27,6 @@
[ME_HFS_ACK_CONTINUE] = "Continue to boot"
};
-static inline void pci_read_dword_ptr(struct udevice *me_dev, void *ptr,
- int offset)
-{
- u32 dword;
-
- dm_pci_read_config32(me_dev, offset, &dword);
- memcpy(ptr, &dword, sizeof(dword));
-}
-
-static inline void pci_write_dword_ptr(struct udevice *me_dev, void *ptr,
- int offset)
-{
- u32 dword = 0;
-
- memcpy(&dword, ptr, sizeof(dword));
- dm_pci_write_config32(me_dev, offset, dword);
-}
-
-void intel_early_me_status(struct udevice *me_dev)
-{
- struct me_hfs hfs;
- struct me_gmes gmes;
-
- pci_read_dword_ptr(me_dev, &hfs, PCI_ME_HFS);
- pci_read_dword_ptr(me_dev, &gmes, PCI_ME_GMES);
-
- intel_me_status(&hfs, &gmes);
-}
-
int intel_early_me_init(struct udevice *me_dev)
{
int count;
@@ -159,7 +130,7 @@
debug("ME: Requested BIOS Action: %s\n", me_ack_values[hfs.ack_data]);
/* Check status after acknowledgement */
- intel_early_me_status(me_dev);
+ intel_me_status(me_dev);
switch (hfs.ack_data) {
case ME_HFS_ACK_CONTINUE:
diff --git a/arch/x86/cpu/ivybridge/sdram.c b/arch/x86/cpu/ivybridge/sdram.c
index f7dd61f..e0296a2 100644
--- a/arch/x86/cpu/ivybridge/sdram.c
+++ b/arch/x86/cpu/ivybridge/sdram.c
@@ -27,6 +27,7 @@
#include <asm/mrccache.h>
#include <asm/mtrr.h>
#include <asm/pci.h>
+#include <asm/report_platform.h>
#include <asm/arch/me.h>
#include <asm/arch/pei_data.h>
#include <asm/arch/pch.h>
@@ -384,7 +385,7 @@
if (BASE_REV_SNB == done)
intel_early_me_init_done(dev, me_dev, ME_INIT_STATUS_SUCCESS);
else
- intel_early_me_status(me_dev);
+ intel_me_status(me_dev);
post_system_agent_init(pei_data);
report_memory_config();