tree 4df87ca079c9eaae1600430eafde995d2b087476
parent 4dfad7531c72d9a6f820c503e0a49dce7beafeec
author Lokesh Vutla <lokeshvutla@ti.com> 1364415882 +0000
committer Tom Rini <trini@ti.com> 1368188755 -0400

arm: omap: emif: Fix DDR3 init after warm reset

EMIF supports a global warm reset mode, during which the
EMIF keeps the SDRAM content. But if leveling is enabled
at the time of warm reset for DDR3, the following steps
needs to be done after warm reset:
1) Keep EMIF in self refresh mode.
2) Reset PHY to bring back the PHY to a known state.
3) Start Levelling procedure.
Doing the same.
And also enabling DLL lock and code output after warm reset.

Tested on OMAP5432 ES2.0

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>