ARM: Factor out reusable psci_cpu_entry
_sunxi_cpu_entry can be converted completely into a reusable
psci_cpu_entry. Tegra124 will use it as well.
As with psci_disable_smp, also the enabling is designed to be overloaded
in cased SMP is not controlled via ACTLR.
CC: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Tested-by: Thierry Reding <treding@nvidia.com>
Tested-by: Ian Campbell <ijc@hellion.org.uk>
Signed-off-by: Tom Warren <twarren@nvidia.com>
diff --git a/arch/arm/cpu/armv7/psci.S b/arch/arm/cpu/armv7/psci.S
index cdcdccd..7d89b43 100644
--- a/arch/arm/cpu/armv7/psci.S
+++ b/arch/arm/cpu/armv7/psci.S
@@ -165,6 +165,15 @@
ENDPROC(psci_disable_smp)
.weak psci_disable_smp
+ENTRY(psci_enable_smp)
+ mrc p15, 0, r0, c1, c0, 1 @ ACTLR
+ orr r0, r0, #(1 << 6) @ Set SMP bit
+ mcr p15, 0, r0, c1, c0, 1 @ ACTLR
+ isb
+ bx lr
+ENDPROC(psci_enable_smp)
+.weak psci_enable_smp
+
ENTRY(psci_cpu_off_common)
push {lr}
@@ -184,4 +193,18 @@
bx lr
ENDPROC(psci_cpu_off_common)
+ENTRY(psci_cpu_entry)
+ bl psci_enable_smp
+
+ bl _nonsec_init
+
+ adr r0, _psci_target_pc
+ ldr r0, [r0]
+ b _do_nonsec_entry
+ENDPROC(psci_cpu_entry)
+
+.globl _psci_target_pc
+_psci_target_pc:
+ .word 0
+
.popsection