| commit | b61820193e6d43e5c87ac5b92d04e3cfeab4d657 | [log] [tgz] |
|---|---|---|
| author | Hanyuan Zhao <hanyuan-z@qq.com> | Fri Aug 09 16:56:57 2024 +0800 |
| committer | Tom Rini <trini@konsulko.com> | Sun Oct 27 10:15:29 2024 -0600 |
| tree | 05cbcec3eeb3bc2eb9dc47a7f646cdf0b38ff7cd | |
| parent | 66c28618494641151053c4d5ff6c1a27bec8de49 [diff] |
net: dc2114x: add support for CPUs that have cache between the memory and the card This commit adds support for the MIPS and LoongArch CPUs, which would use cache after they jump into U-Boot. This commit requests the CPU to return the addresses in uncached windows and flushes the cache in need, to make sure the memory between the CPU and the network card is in consistency. Signed-off-by: Hanyuan Zhao <zhaohy22@mails.tsinghua.edu.cn>