ARM: dts: sun7i: Sync from Linux v5.18-rc1
Copy the devicetree source for the A20 SoC and all existing boards
verbatim from the Linux v5.18-rc1 tag.
This commit also adds the following new board devicetrees:
- sun7i-a20-haoyu-marsboard.dts
- sun7i-a20-linutronix-testbox-v2.dts
- sun7i-a20-olinuxino-lime-emmc.dts
This update includes changes to the USB PHY detection GPIO properties
which are needed to convert that driver to use the DM GPIO framework.
Signed-off-by: Samuel Holland <samuel@sholland.org>
[Andre: fix Mele M5 U-Boot only DT]
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
diff --git a/arch/arm/dts/sun7i-a20.dtsi b/arch/arm/dts/sun7i-a20.dtsi
index 641a8fa..5574299 100644
--- a/arch/arm/dts/sun7i-a20.dtsi
+++ b/arch/arm/dts/sun7i-a20.dtsi
@@ -47,6 +47,7 @@
#include <dt-bindings/dma/sun4i-a10.h>
#include <dt-bindings/clock/sun7i-a20-ccu.h>
#include <dt-bindings/reset/sun4i-a10-ccu.h>
+#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
interrupt-parent = <&gic>;
@@ -105,16 +106,15 @@
reg = <0>;
clocks = <&ccu CLK_CPU>;
clock-latency = <244144>; /* 8 32k periods */
- operating-points = <
+ operating-points =
/* kHz uV */
- 960000 1400000
- 912000 1400000
- 864000 1300000
- 720000 1200000
- 528000 1100000
- 312000 1000000
- 144000 1000000
- >;
+ <960000 1400000>,
+ <912000 1400000>,
+ <864000 1300000>,
+ <720000 1200000>,
+ <528000 1100000>,
+ <312000 1000000>,
+ <144000 1000000>;
#cooling-cells = <2>;
};
@@ -124,22 +124,21 @@
reg = <1>;
clocks = <&ccu CLK_CPU>;
clock-latency = <244144>; /* 8 32k periods */
- operating-points = <
+ operating-points =
/* kHz uV */
- 960000 1400000
- 912000 1400000
- 864000 1300000
- 720000 1200000
- 528000 1100000
- 312000 1000000
- 144000 1000000
- >;
+ <960000 1400000>,
+ <912000 1400000>,
+ <864000 1300000>,
+ <720000 1200000>,
+ <528000 1100000>,
+ <312000 1000000>,
+ <144000 1000000>;
#cooling-cells = <2>;
};
};
thermal-zones {
- cpu_thermal {
+ cpu-thermal {
/* milliseconds */
polling-delay-passive = <250>;
polling-delay = <1000>;
@@ -180,7 +179,7 @@
default-pool {
compatible = "shared-dma-pool";
size = <0x6000000>;
- alloc-ranges = <0x4a000000 0x6000000>;
+ alloc-ranges = <0x40000000 0x10000000>;
reusable;
linux,cma-default;
};
@@ -333,7 +332,7 @@
#dma-cells = <2>;
};
- nfc: nand@1c03000 {
+ nfc: nand-controller@1c03000 {
compatible = "allwinner,sun4i-a10-nand";
reg = <0x01c03000 0x1000>;
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
@@ -376,6 +375,16 @@
num-cs = <1>;
};
+ csi0: csi@1c09000 {
+ compatible = "allwinner,sun7i-a20-csi0";
+ reg = <0x01c09000 0x1000>;
+ interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_AHB_CSI0>, <&ccu CLK_CSI_SCLK>, <&ccu CLK_DRAM_CSI0>;
+ clock-names = "bus", "isp", "ram";
+ resets = <&ccu RST_CSI0>;
+ status = "disabled";
+ };
+
emac: ethernet@1c0b000 {
compatible = "allwinner,sun4i-a10-emac";
reg = <0x01c0b000 0x1000>;
@@ -394,11 +403,12 @@
};
tcon0: lcd-controller@1c0c000 {
- compatible = "allwinner,sun7i-a20-tcon";
+ compatible = "allwinner,sun7i-a20-tcon0",
+ "allwinner,sun7i-a20-tcon";
reg = <0x01c0c000 0x1000>;
interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
- resets = <&ccu RST_TCON0>;
- reset-names = "lcd";
+ resets = <&ccu RST_TCON0>, <&ccu RST_LVDS>;
+ reset-names = "lcd", "lvds";
clocks = <&ccu CLK_AHB_LCD0>,
<&ccu CLK_TCON0_CH0>,
<&ccu CLK_TCON0_CH1>;
@@ -406,6 +416,7 @@
"tcon-ch0",
"tcon-ch1";
clock-output-names = "tcon0-pixel-clock";
+ #clock-cells = <0>;
dmas = <&dma SUN4I_DMA_DEDICATED 14>;
ports {
@@ -443,7 +454,8 @@
};
tcon1: lcd-controller@1c0d000 {
- compatible = "allwinner,sun7i-a20-tcon";
+ compatible = "allwinner,sun7i-a20-tcon1",
+ "allwinner,sun7i-a20-tcon";
reg = <0x01c0d000 0x1000>;
interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
resets = <&ccu RST_TCON1>;
@@ -455,6 +467,7 @@
"tcon-ch0",
"tcon-ch1";
clock-output-names = "tcon1-pixel-clock";
+ #clock-cells = <0>;
dmas = <&dma SUN4I_DMA_DEDICATED 15>;
ports {
@@ -586,13 +599,14 @@
phy-names = "usb";
extcon = <&usbphy 0>;
allwinner,sram = <&otg_sram 1>;
+ dr_mode = "otg";
status = "disabled";
};
usbphy: phy@1c13400 {
#phy-cells = <1>;
compatible = "allwinner,sun7i-a20-usb-phy";
- reg = <0x01c13400 0x10 0x01c14800 0x4 0x01c1c800 0x4>;
+ reg = <0x01c13400 0x10>, <0x01c14800 0x4>, <0x01c1c800 0x4>;
reg-names = "phy_ctrl", "pmu1", "pmu2";
clocks = <&ccu CLK_USB_PHY>;
clock-names = "usb_phy";
@@ -716,6 +730,17 @@
status = "disabled";
};
+ csi1: csi@1c1d000 {
+ compatible = "allwinner,sun7i-a20-csi1",
+ "allwinner,sun4i-a10-csi1";
+ reg = <0x01c1d000 0x1000>;
+ interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_AHB_CSI1>, <&ccu CLK_DRAM_CSI1>;
+ clock-names = "bus", "ram";
+ resets = <&ccu RST_CSI1>;
+ status = "disabled";
+ };
+
spi3: spi@1c1f000 {
compatible = "allwinner,sun4i-a10-spi";
reg = <0x01c1f000 0x1000>;
@@ -751,21 +776,70 @@
#interrupt-cells = <3>;
#gpio-cells = <3>;
+ /omit-if-no-ref/
+ can_pa_pins: can-pa-pins {
+ pins = "PA16", "PA17";
+ function = "can";
+ };
+
+ /omit-if-no-ref/
can_ph_pins: can-ph-pins {
pins = "PH20", "PH21";
function = "can";
};
+ /omit-if-no-ref/
clk_out_a_pin: clk-out-a-pin {
pins = "PI12";
function = "clk_out_a";
};
+ /omit-if-no-ref/
clk_out_b_pin: clk-out-b-pin {
pins = "PI13";
function = "clk_out_b";
};
+ /omit-if-no-ref/
+ csi0_8bits_pins: csi-8bits-pins {
+ pins = "PE0", "PE2", "PE3", "PE4", "PE5",
+ "PE6", "PE7", "PE8", "PE9", "PE10",
+ "PE11";
+ function = "csi0";
+ };
+
+ /omit-if-no-ref/
+ csi0_clk_pin: csi-clk-pin {
+ pins = "PE1";
+ function = "csi0";
+ };
+
+ /omit-if-no-ref/
+ csi1_8bits_pg_pins: csi1-8bits-pg-pins {
+ pins = "PG0", "PG2", "PG3", "PG4", "PG5",
+ "PG6", "PG7", "PG8", "PG9", "PG10",
+ "PG11";
+ function = "csi1";
+ };
+
+ /omit-if-no-ref/
+ csi1_24bits_ph_pins: csi1-24bits-ph-pins {
+ pins = "PH0", "PH1", "PH2", "PH3", "PH4",
+ "PH5", "PH6", "PH7", "PH8", "PH9",
+ "PH10", "PH11", "PH12", "PH13", "PH14",
+ "PH15", "PH16", "PH17", "PH18", "PH19",
+ "PH20", "PH21", "PH22", "PH23", "PH24",
+ "PH25", "PH26", "PH27";
+ function = "csi1";
+ };
+
+ /omit-if-no-ref/
+ csi1_clk_pg_pin: csi1-clk-pg-pin {
+ pins = "PG1";
+ function = "csi1";
+ };
+
+ /omit-if-no-ref/
emac_pa_pins: emac-pa-pins {
pins = "PA0", "PA1", "PA2",
"PA3", "PA4", "PA5", "PA6",
@@ -775,6 +849,17 @@
function = "emac";
};
+ /omit-if-no-ref/
+ emac_ph_pins: emac-ph-pins {
+ pins = "PH8", "PH9", "PH10", "PH11",
+ "PH14", "PH15", "PH16", "PH17",
+ "PH18", "PH19", "PH20", "PH21",
+ "PH22", "PH23", "PH24", "PH25",
+ "PH26";
+ function = "emac";
+ };
+
+ /omit-if-no-ref/
gmac_mii_pins: gmac-mii-pins {
pins = "PA0", "PA1", "PA2",
"PA3", "PA4", "PA5", "PA6",
@@ -784,6 +869,7 @@
function = "gmac";
};
+ /omit-if-no-ref/
gmac_rgmii_pins: gmac-rgmii-pins {
pins = "PA0", "PA1", "PA2",
"PA3", "PA4", "PA5", "PA6",
@@ -798,46 +884,69 @@
drive-strength = <40>;
};
+ /omit-if-no-ref/
i2c0_pins: i2c0-pins {
pins = "PB0", "PB1";
function = "i2c0";
};
+ /omit-if-no-ref/
i2c1_pins: i2c1-pins {
pins = "PB18", "PB19";
function = "i2c1";
};
+ /omit-if-no-ref/
i2c2_pins: i2c2-pins {
pins = "PB20", "PB21";
function = "i2c2";
};
+ /omit-if-no-ref/
i2c3_pins: i2c3-pins {
pins = "PI0", "PI1";
function = "i2c3";
};
+ /omit-if-no-ref/
ir0_rx_pin: ir0-rx-pin {
pins = "PB4";
function = "ir0";
};
+ /omit-if-no-ref/
ir0_tx_pin: ir0-tx-pin {
pins = "PB3";
function = "ir0";
};
+ /omit-if-no-ref/
ir1_rx_pin: ir1-rx-pin {
pins = "PB23";
function = "ir1";
};
+ /omit-if-no-ref/
ir1_tx_pin: ir1-tx-pin {
pins = "PB22";
function = "ir1";
};
+ /omit-if-no-ref/
+ lcd_lvds0_pins: lcd-lvds0-pins {
+ pins = "PD0", "PD1", "PD2", "PD3", "PD4",
+ "PD5", "PD6", "PD7", "PD8", "PD9";
+ function = "lvds0";
+ };
+
+ /omit-if-no-ref/
+ lcd_lvds1_pins: lcd-lvds1-pins {
+ pins = "PD10", "PD11", "PD12", "PD13", "PD14",
+ "PD15", "PD16", "PD17", "PD18", "PD19";
+ function = "lvds1";
+ };
+
+ /omit-if-no-ref/
mmc0_pins: mmc0-pins {
pins = "PF0", "PF1", "PF2",
"PF3", "PF4", "PF5";
@@ -846,6 +955,7 @@
bias-pull-up;
};
+ /omit-if-no-ref/
mmc2_pins: mmc2-pins {
pins = "PC6", "PC7", "PC8",
"PC9", "PC10", "PC11";
@@ -854,6 +964,7 @@
bias-pull-up;
};
+ /omit-if-no-ref/
mmc3_pins: mmc3-pins {
pins = "PI4", "PI5", "PI6",
"PI7", "PI8", "PI9";
@@ -862,127 +973,206 @@
bias-pull-up;
};
+ /omit-if-no-ref/
ps2_0_pins: ps2-0-pins {
pins = "PI20", "PI21";
function = "ps2";
};
+ /omit-if-no-ref/
ps2_1_ph_pins: ps2-1-ph-pins {
pins = "PH12", "PH13";
function = "ps2";
};
+ /omit-if-no-ref/
pwm0_pin: pwm0-pin {
pins = "PB2";
function = "pwm";
};
+ /omit-if-no-ref/
pwm1_pin: pwm1-pin {
pins = "PI3";
function = "pwm";
};
+ /omit-if-no-ref/
spdif_tx_pin: spdif-tx-pin {
pins = "PB13";
function = "spdif";
bias-pull-up;
};
+ /omit-if-no-ref/
spi0_pi_pins: spi0-pi-pins {
pins = "PI11", "PI12", "PI13";
function = "spi0";
};
+ /omit-if-no-ref/
spi0_cs0_pi_pin: spi0-cs0-pi-pin {
pins = "PI10";
function = "spi0";
};
+ /omit-if-no-ref/
spi0_cs1_pi_pin: spi0-cs1-pi-pin {
pins = "PI14";
function = "spi0";
};
+ /omit-if-no-ref/
spi1_pi_pins: spi1-pi-pins {
pins = "PI17", "PI18", "PI19";
function = "spi1";
};
+ /omit-if-no-ref/
spi1_cs0_pi_pin: spi1-cs0-pi-pin {
pins = "PI16";
function = "spi1";
};
+ /omit-if-no-ref/
spi2_pb_pins: spi2-pb-pins {
pins = "PB15", "PB16", "PB17";
function = "spi2";
};
+ /omit-if-no-ref/
spi2_cs0_pb_pin: spi2-cs0-pb-pin {
pins = "PB14";
function = "spi2";
};
+ /omit-if-no-ref/
spi2_pc_pins: spi2-pc-pins {
pins = "PC20", "PC21", "PC22";
function = "spi2";
};
+ /omit-if-no-ref/
spi2_cs0_pc_pin: spi2-cs0-pc-pin {
pins = "PC19";
function = "spi2";
};
+ /omit-if-no-ref/
uart0_pb_pins: uart0-pb-pins {
pins = "PB22", "PB23";
function = "uart0";
};
+ /omit-if-no-ref/
+ uart0_pf_pins: uart0-pf-pins {
+ pins = "PF2", "PF4";
+ function = "uart0";
+ };
+
+ /omit-if-no-ref/
+ uart1_pa_pins: uart1-pa-pins {
+ pins = "PA10", "PA11";
+ function = "uart1";
+ };
+
+ /omit-if-no-ref/
+ uart1_cts_rts_pa_pins: uart1-cts-rts-pa-pins {
+ pins = "PA12", "PA13";
+ function = "uart1";
+ };
+
+ /omit-if-no-ref/
+ uart2_pa_pins: uart2-pa-pins {
+ pins = "PA2", "PA3";
+ function = "uart2";
+ };
+
+ /omit-if-no-ref/
+ uart2_cts_rts_pa_pins: uart2-cts-rts-pa-pins {
+ pins = "PA0", "PA1";
+ function = "uart2";
+ };
+
+ /omit-if-no-ref/
uart2_pi_pins: uart2-pi-pins {
pins = "PI18", "PI19";
function = "uart2";
};
+ /omit-if-no-ref/
uart2_cts_rts_pi_pins: uart2-cts-rts-pi-pins {
pins = "PI16", "PI17";
function = "uart2";
};
+ /omit-if-no-ref/
uart3_pg_pins: uart3-pg-pins {
pins = "PG6", "PG7";
function = "uart3";
};
+ /omit-if-no-ref/
uart3_cts_rts_pg_pins: uart3-cts-rts-pg-pins {
pins = "PG8", "PG9";
function = "uart3";
};
+ /omit-if-no-ref/
uart3_ph_pins: uart3-ph-pins {
pins = "PH0", "PH1";
function = "uart3";
};
+ /omit-if-no-ref/
+ uart3_cts_rts_ph_pins: uart3-cts-rts-ph-pins {
+ pins = "PH2", "PH3";
+ function = "uart3";
+ };
+
+ /omit-if-no-ref/
uart4_pg_pins: uart4-pg-pins {
pins = "PG10", "PG11";
function = "uart4";
};
+ /omit-if-no-ref/
uart4_ph_pins: uart4-ph-pins {
pins = "PH4", "PH5";
function = "uart4";
};
+ /omit-if-no-ref/
+ uart5_ph_pins: uart5-ph-pins {
+ pins = "PH6", "PH7";
+ function = "uart5";
+ };
+
+ /omit-if-no-ref/
uart5_pi_pins: uart5-pi-pins {
pins = "PI10", "PI11";
function = "uart5";
};
+ /omit-if-no-ref/
+ uart6_pa_pins: uart6-pa-pins {
+ pins = "PA12", "PA13";
+ function = "uart6";
+ };
+
+ /omit-if-no-ref/
uart6_pi_pins: uart6-pi-pins {
pins = "PI12", "PI13";
function = "uart6";
};
+ /omit-if-no-ref/
+ uart7_pa_pins: uart7-pa-pins {
+ pins = "PA14", "PA15";
+ function = "uart7";
+ };
+
+ /omit-if-no-ref/
uart7_pi_pins: uart7-pi-pins {
pins = "PI20", "PI21";
function = "uart7";
@@ -1004,6 +1194,8 @@
wdt: watchdog@1c20c90 {
compatible = "allwinner,sun4i-a10-wdt";
reg = <0x01c20c90 0x10>;
+ interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&osc24M>;
};
rtc: rtc@1c20d00 {
@@ -1326,8 +1518,12 @@
snps,fixed-burst;
snps,force_sf_dma_mode;
status = "disabled";
- #address-cells = <1>;
- #size-cells = <0>;
+
+ gmac_mdio: mdio {
+ compatible = "snps,dwmac-mdio";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
};
hstimer@1c60000 {
@@ -1341,7 +1537,7 @@
};
gic: interrupt-controller@1c81000 {
- compatible = "arm,gic-400", "arm,cortex-a7-gic", "arm,cortex-a15-gic";
+ compatible = "arm,gic-400";
reg = <0x01c81000 0x1000>,
<0x01c82000 0x2000>,
<0x01c84000 0x2000>,