riscv: Rename SiFive CLINT to RISC-V ALINT
As the RISC-V ACLINT specification is defined to be backward compatible
with the SiFive CLINT specification, we rename SiFive CLINT to RISC-V
ALINT in the source tree to be future-proof.
Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Rick Chen <rick@andestech.com>
diff --git a/drivers/timer/Makefile b/drivers/timer/Makefile
index cdc20f5..1ca7480 100644
--- a/drivers/timer/Makefile
+++ b/drivers/timer/Makefile
@@ -25,7 +25,7 @@
obj-$(CONFIG_ROCKCHIP_TIMER) += rockchip_timer.o
obj-$(CONFIG_SANDBOX_TIMER) += sandbox_timer.o
obj-$(CONFIG_SP804_TIMER) += sp804_timer.o
-obj-$(CONFIG_$(SPL_)SIFIVE_CLINT) += sifive_clint_timer.o
+obj-$(CONFIG_$(SPL_)RISCV_ACLINT) += riscv_aclint_timer.o
obj-$(CONFIG_ARM_GLOBAL_TIMER) += arm_global_timer.o
obj-$(CONFIG_STM32_TIMER) += stm32_timer.o
obj-$(CONFIG_TEGRA_TIMER) += tegra-timer.o
diff --git a/drivers/timer/sifive_clint_timer.c b/drivers/timer/riscv_aclint_timer.c
similarity index 75%
rename from drivers/timer/sifive_clint_timer.c
rename to drivers/timer/riscv_aclint_timer.c
index be45f17..e29d527 100644
--- a/drivers/timer/sifive_clint_timer.c
+++ b/drivers/timer/riscv_aclint_timer.c
@@ -18,7 +18,7 @@
/* mtime register */
#define MTIME_REG(base, offset) ((ulong)(base) + (offset))
-static u64 notrace sifive_clint_get_count(struct udevice *dev)
+static u64 notrace riscv_aclint_timer_get_count(struct udevice *dev)
{
return readq((void __iomem *)MTIME_REG(dev_get_priv(dev),
dev_get_driver_data(dev)));
@@ -44,11 +44,11 @@
}
#endif
-static const struct timer_ops sifive_clint_ops = {
- .get_count = sifive_clint_get_count,
+static const struct timer_ops riscv_aclint_timer_ops = {
+ .get_count = riscv_aclint_timer_get_count,
};
-static int sifive_clint_probe(struct udevice *dev)
+static int riscv_aclint_timer_probe(struct udevice *dev)
{
dev_set_priv(dev, dev_read_addr_ptr(dev));
if (!dev_get_priv(dev))
@@ -57,18 +57,18 @@
return timer_timebase_fallback(dev);
}
-static const struct udevice_id sifive_clint_ids[] = {
+static const struct udevice_id riscv_aclint_timer_ids[] = {
{ .compatible = "riscv,clint0", .data = CLINT_MTIME_OFFSET },
{ .compatible = "sifive,clint0", .data = CLINT_MTIME_OFFSET },
{ .compatible = "riscv,aclint-mtimer", .data = ACLINT_MTIME_OFFSET },
{ }
};
-U_BOOT_DRIVER(sifive_clint) = {
- .name = "sifive_clint",
+U_BOOT_DRIVER(riscv_aclint_timer) = {
+ .name = "riscv_aclint_timer",
.id = UCLASS_TIMER,
- .of_match = sifive_clint_ids,
- .probe = sifive_clint_probe,
- .ops = &sifive_clint_ops,
+ .of_match = riscv_aclint_timer_ids,
+ .probe = riscv_aclint_timer_probe,
+ .ops = &riscv_aclint_timer_ops,
.flags = DM_FLAG_PRE_RELOC,
};