| commit | b5bb08dfecf5a86381e221297b25807214cabfb8 | [log] [tgz] |
|---|---|---|
| author | Patrick Delaunay <patrick.delaunay@foss.st.com> | Fri May 20 18:24:50 2022 +0200 |
| committer | Patrick Delaunay <patrick.delaunay@foss.st.com> | Fri Jun 17 10:41:16 2022 +0200 |
| tree | 0589833b5c9de92888fe60071500751bb1bfaf99 | |
| parent | 37c4b55c04329f9872c17113d6362fa89687b402 [diff] |
ram: stm32mp1: add support of STM32MP13x Add support for new compatible "st,stm32mp13-ddr" to manage the DDR sub system (Controller and PHY) in STM32MP13x SOC: - only one AXI port - support of 16 port output (MEMC_DRAM_DATA_WIDTH = 2) The STM32MP15x SOC have 2 AXI ports and 32 bits support. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>