board: at91sam9261ek: Update to support DT and DM
Add the dts files to support deivce tree, update the configuration
files to support the device tree and driver model. The peripheral
clock and pins configuration are handled by the clock and the pinctrl
drivers respectively.
Enable the early debug UART to debug problems when an ICE or other
debug mechanism is not available.
Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
diff --git a/arch/arm/dts/at91sam9261.dtsi b/arch/arm/dts/at91sam9261.dtsi
index 5e09de4..69c2d6e 100644
--- a/arch/arm/dts/at91sam9261.dtsi
+++ b/arch/arm/dts/at91sam9261.dtsi
@@ -30,6 +30,7 @@
ssc0 = &ssc0;
ssc1 = &ssc1;
ssc2 = &ssc2;
+ spi0 = &spi0;
};
cpus {
@@ -70,6 +71,7 @@
#address-cells = <1>;
#size-cells = <1>;
ranges;
+ u-boot,dm-pre-reloc;
usb0: ohci@00500000 {
compatible = "atmel,at91rm9200-ohci", "usb-ohci";
@@ -112,6 +114,7 @@
#address-cells = <1>;
#size-cells = <1>;
ranges;
+ u-boot,dm-pre-reloc;
tcb0: timer@fffa0000 {
compatible = "atmel,at91rm9200-tcb";
@@ -286,20 +289,61 @@
status = "disabled";
};
+ pioA: gpio@fffff400 {
+ compatible = "atmel,at91rm9200-gpio";
+ reg = <0xfffff400 0x200>;
+ interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ clocks = <&pioA_clk>;
+ u-boot,dm-pre-reloc;
+ };
+
+ pioB: gpio@fffff600 {
+ compatible = "atmel,at91rm9200-gpio";
+ reg = <0xfffff600 0x200>;
+ interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ clocks = <&pioB_clk>;
+ u-boot,dm-pre-reloc;
+ };
+
+ pioC: gpio@fffff800 {
+ compatible = "atmel,at91rm9200-gpio";
+ reg = <0xfffff800 0x200>;
+ interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ clocks = <&pioC_clk>;
+ u-boot,dm-pre-reloc;
+ };
+
pinctrl@fffff400 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
ranges = <0xfffff400 0xfffff400 0x600>;
-
+ reg = <0xfffff400 0x200 /* pioA */
+ 0xfffff600 0x200 /* pioB */
+ 0xfffff800 0x200 /* pioC */
+ >;
atmel,mux-mask =
/* A B */
<0xffffffff 0xfffffff7>, /* pioA */
<0xffffffff 0xfffffff4>, /* pioB */
<0xffffffff 0xffffff07>; /* pioC */
+ u-boot,dm-pre-reloc;
/* shared pinctrl settings */
dbgu {
+ u-boot,dm-pre-reloc;
pinctrl_dbgu: dbgu-0 {
atmel,pins =
<AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE>,
@@ -532,39 +576,6 @@
<AT91_PIOB 28 AT91_PERIPH_B AT91_PINCTRL_NONE>;
};
};
-
- pioA: gpio@fffff400 {
- compatible = "atmel,at91rm9200-gpio";
- reg = <0xfffff400 0x200>;
- interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
- #gpio-cells = <2>;
- gpio-controller;
- interrupt-controller;
- #interrupt-cells = <2>;
- clocks = <&pioA_clk>;
- };
-
- pioB: gpio@fffff600 {
- compatible = "atmel,at91rm9200-gpio";
- reg = <0xfffff600 0x200>;
- interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
- #gpio-cells = <2>;
- gpio-controller;
- interrupt-controller;
- #interrupt-cells = <2>;
- clocks = <&pioB_clk>;
- };
-
- pioC: gpio@fffff800 {
- compatible = "atmel,at91rm9200-gpio";
- reg = <0xfffff800 0x200>;
- interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
- #gpio-cells = <2>;
- gpio-controller;
- interrupt-controller;
- #interrupt-cells = <2>;
- clocks = <&pioC_clk>;
- };
};
pmc: pmc@fffffc00 {
@@ -575,6 +586,7 @@
#address-cells = <1>;
#size-cells = <0>;
#interrupt-cells = <1>;
+ u-boot,dm-pre-reloc;
main_osc: main_osc {
compatible = "atmel,at91rm9200-clk-main-osc";
@@ -589,7 +601,7 @@
clocks = <&main_osc>;
};
- plla: pllack {
+ plla: pllack@0 {
compatible = "atmel,at91rm9200-clk-pll";
#clock-cells = <0>;
interrupts-extended = <&pmc AT91_PMC_LOCKA>;
@@ -601,7 +613,7 @@
<190000000 240000000 2 1>;
};
- pllb: pllbck {
+ pllb: pllbck@1 {
compatible = "atmel,at91rm9200-clk-pll";
#clock-cells = <0>;
interrupts-extended = <&pmc AT91_PMC_LOCKB>;
@@ -619,6 +631,7 @@
clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>;
atmel,clk-output-range = <0 94000000>;
atmel,clk-divisors = <1 2 4 0>;
+ u-boot,dm-pre-reloc;
};
usb: usbck {
@@ -635,25 +648,25 @@
interrupt-parent = <&pmc>;
clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>;
- prog0: prog0 {
+ prog0: progi@0 {
#clock-cells = <0>;
reg = <0>;
interrupts = <AT91_PMC_PCKRDY(0)>;
};
- prog1: prog1 {
+ prog1: prog@1 {
#clock-cells = <0>;
reg = <1>;
interrupts = <AT91_PMC_PCKRDY(1)>;
};
- prog2: prog2 {
+ prog2: prog@2 {
#clock-cells = <0>;
reg = <2>;
interrupts = <AT91_PMC_PCKRDY(2)>;
};
- prog3: prog3 {
+ prog3: prog@3 {
#clock-cells = <0>;
reg = <3>;
interrupts = <AT91_PMC_PCKRDY(3)>;
@@ -665,49 +678,49 @@
#address-cells = <1>;
#size-cells = <0>;
- uhpck: uhpck {
+ uhpck: uhpck@6 {
#clock-cells = <0>;
reg = <6>;
clocks = <&usb>;
};
- udpck: udpck {
+ udpck: udpck@7 {
#clock-cells = <0>;
reg = <7>;
clocks = <&usb>;
};
- pck0: pck0 {
+ pck0: pck@8 {
#clock-cells = <0>;
reg = <8>;
clocks = <&prog0>;
};
- pck1: pck1 {
+ pck1: pck@9 {
#clock-cells = <0>;
reg = <9>;
clocks = <&prog1>;
};
- pck2: pck2 {
+ pck2: pck@10 {
#clock-cells = <0>;
reg = <10>;
clocks = <&prog2>;
};
- pck3: pck3 {
+ pck3: pck@11 {
#clock-cells = <0>;
reg = <11>;
clocks = <&prog3>;
};
- hclk0: hclk0 {
+ hclk0: hclk@16 {
#clock-cells = <0>;
reg = <16>;
clocks = <&mck>;
};
- hclk1: hclk1 {
+ hclk1: hclk@17 {
#clock-cells = <0>;
reg = <17>;
clocks = <&mck>;
@@ -719,98 +732,102 @@
#address-cells = <1>;
#size-cells = <0>;
clocks = <&mck>;
+ u-boot,dm-pre-reloc;
- pioA_clk: pioA_clk {
+ pioA_clk: pioA_clk@2 {
#clock-cells = <0>;
reg = <2>;
+ u-boot,dm-pre-reloc;
};
- pioB_clk: pioB_clk {
+ pioB_clk: pioB_clk@3 {
#clock-cells = <0>;
reg = <3>;
+ u-boot,dm-pre-reloc;
};
- pioC_clk: pioC_clk {
+ pioC_clk: pioC_clk@4 {
#clock-cells = <0>;
reg = <4>;
+ u-boot,dm-pre-reloc;
};
- usart0_clk: usart0_clk {
+ usart0_clk: usart0_clk@6 {
#clock-cells = <0>;
reg = <6>;
};
- usart1_clk: usart1_clk {
+ usart1_clk: usart1_clk@7 {
#clock-cells = <0>;
reg = <7>;
};
- usart2_clk: usart2_clk {
+ usart2_clk: usart2_clk@8 {
#clock-cells = <0>;
reg = <8>;
};
- mci0_clk: mci0_clk {
+ mci0_clk: mci0_clk@9 {
#clock-cells = <0>;
reg = <9>;
};
- udc_clk: udc_clk {
+ udc_clk: udc_clk@10 {
#clock-cells = <0>;
reg = <10>;
};
- twi0_clk: twi0_clk {
+ twi0_clk: twi0_clk@11 {
reg = <11>;
#clock-cells = <0>;
};
- spi0_clk: spi0_clk {
+ spi0_clk: spi0_clk@12 {
#clock-cells = <0>;
reg = <12>;
};
- spi1_clk: spi1_clk {
+ spi1_clk: spi1_clk@13 {
#clock-cells = <0>;
reg = <13>;
};
- ssc0_clk: ssc0_clk {
+ ssc0_clk: ssc0_clk@14 {
#clock-cells = <0>;
reg = <14>;
};
- ssc1_clk: ssc1_clk {
+ ssc1_clk: ssc1_clk@15 {
#clock-cells = <0>;
reg = <15>;
};
- ssc2_clk: ssc2_clk {
+ ssc2_clk: ssc2_clk@16 {
#clock-cells = <0>;
reg = <16>;
};
- tc0_clk: tc0_clk {
+ tc0_clk: tc0_clk@17 {
#clock-cells = <0>;
reg = <17>;
};
- tc1_clk: tc1_clk {
+ tc1_clk: tc1_clk@18 {
#clock-cells = <0>;
reg = <18>;
};
- tc2_clk: tc2_clk {
+ tc2_clk: tc2_clk@19 {
#clock-cells = <0>;
reg = <19>;
};
- ohci_clk: ohci_clk {
+ ohci_clk: ohci_clk@20 {
#clock-cells = <0>;
reg = <20>;
};
- lcd_clk: lcd_clk {
+ lcd_clk: lcd_clk@21 {
#clock-cells = <0>;
reg = <21>;
};